X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fppc4xx%2Fecc.c;h=3f989e7f59b16083154adc5503636a29ef3eee8a;hb=9b1b8c8a1bf52e9b65e1958e5205838576066cbc;hp=95b941dabbb9c6a0d818071c03048ec2b7f0e9db;hpb=c821b5f120bedf73867513466412587c6912a8f8;p=oweals%2Fu-boot.git

diff --git a/cpu/ppc4xx/ecc.c b/cpu/ppc4xx/ecc.c
index 95b941dabb..3f989e7f59 100644
--- a/cpu/ppc4xx/ecc.c
+++ b/cpu/ppc4xx/ecc.c
@@ -45,7 +45,8 @@
 
 #include "ecc.h"
 
-#if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
+#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR) || \
+    defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2)
 #if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
 /*
  *  void ecc_init()
@@ -67,7 +68,7 @@
  *
  *  Output(s):
  *    start - A pointer to the start of memory covered by ECC with
- *	      CFG_ECC_PATTERN written to all locations and ECC data
+ *	      CONFIG_SYS_ECC_PATTERN written to all locations and ECC data
  *	      primed.
  *
  *  Returns:
@@ -75,8 +76,8 @@
  */
 void ecc_init(unsigned long * const start, unsigned long size)
 {
-	const unsigned long pattern = CFG_ECC_PATTERN;
-	unsigned * const end = (unsigned long * const)((long)start + size);
+	const unsigned long pattern = CONFIG_SYS_ECC_PATTERN;
+	unsigned long * const end = (unsigned long * const)((long)start + size);
 	unsigned long * current = start;
 	unsigned long mcopt1;
 	long increment;
@@ -84,12 +85,12 @@ void ecc_init(unsigned long * const start, unsigned long size)
 	if (start >= end)
 		return;
 
-	mfsdram(SDRAM_MCOPT1, mcopt1);
+	mfsdram(SDRAM_ECC_CFG, mcopt1);
 
 	/* Enable ECC generation without checking or reporting */
 
-	mtsdram(SDRAM_MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) |
-			       SDRAM_MCOPT1_MCHK_GEN));
+	mtsdram(SDRAM_ECC_CFG, ((mcopt1 & ~SDRAM_ECC_CFG_MCHK_MASK) |
+				SDRAM_ECC_CFG_MCHK_GEN));
 
 	increment = sizeof(u32);
 
@@ -99,7 +100,7 @@ void ecc_init(unsigned long * const start, unsigned long size)
 	 * can skip words when writing.
 	 */
 
-	if ((mcopt1 & SDRAM_MCOPT1_DMWD_MASK) != SDRAM_MCOPT1_DMWD_32)
+	if ((mcopt1 & SDRAM_ECC_CFG_DMWD_MASK) != SDRAM_ECC_CFG_DMWD_32)
 		increment = sizeof(u64);
 #endif /* defined(CONFIG_440) */
 
@@ -114,8 +115,8 @@ void ecc_init(unsigned long * const start, unsigned long size)
 
 	/* Enable ECC generation with checking and no reporting */
 
-	mtsdram(SDRAM_MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) |
-			       SDRAM_MCOPT1_MCHK_CHK));
+	mtsdram(SDRAM_ECC_CFG, ((mcopt1 & ~SDRAM_ECC_CFG_MCHK_MASK) |
+				SDRAM_ECC_CFG_MCHK_CHK));
 }
 #endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
-#endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */
+#endif /* defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)... */