X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmpc8xx%2Finterrupts.c;h=20e7012c3724e6b02b7b628973720ff22b6db222;hb=4734cb78d8e57dbac4e9f23d91edd624484b0092;hp=8bc0a1afdea3dd0b9c9601ac3e92b66c49f27bbf;hpb=2535d60277cc295adf75cd5721dcecd840c69a63;p=oweals%2Fu-boot.git

diff --git a/cpu/mpc8xx/interrupts.c b/cpu/mpc8xx/interrupts.c
index 8bc0a1afde..20e7012c37 100644
--- a/cpu/mpc8xx/interrupts.c
+++ b/cpu/mpc8xx/interrupts.c
@@ -22,7 +22,6 @@
  */
 
 #include <common.h>
-#include <watchdog.h>
 #include <mpc8xx.h>
 #include <mpc8xx_irq.h>
 #include <asm/processor.h>
@@ -30,10 +29,6 @@
 
 /************************************************************************/
 
-unsigned decrementer_count;	/* count value for 1e6/HZ microseconds	*/
-
-/************************************************************************/
-
 /*
  * CPM interrupt vector functions.
  */
@@ -50,57 +45,11 @@ static void cpm_interrupt (void *regs);
 
 /************************************************************************/
 
-static __inline__ unsigned long get_msr (void)
-{
-	unsigned long msr;
-
-	asm volatile ("mfmsr %0":"=r" (msr):);
-
-	return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
-	asm volatile ("mtmsr %0"::"r" (msr));
-}
-
-static __inline__ unsigned long get_dec (void)
-{
-	unsigned long val;
-
-	asm volatile ("mfdec %0":"=r" (val):);
-
-	return val;
-}
-
-
-static __inline__ void set_dec (unsigned long val)
-{
-	asm volatile ("mtdec %0"::"r" (val));
-}
-
-
-void enable_interrupts (void)
-{
-	set_msr (get_msr () | MSR_EE);
-}
-
-/* returns flag if MSR_EE was set before */
-int disable_interrupts (void)
-{
-	ulong msr = get_msr ();
-
-	set_msr (msr & ~MSR_EE);
-	return ((msr & MSR_EE) != 0);
-}
-
-/************************************************************************/
-
-int interrupt_init (void)
+int interrupt_init_cpu (unsigned *decrementer_count)
 {
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 
-	decrementer_count = get_tbclk () / CFG_HZ;
+	*decrementer_count = get_tbclk () / CFG_HZ;
 
 	/* disable all interrupts */
 	immr->im_siu_conf.sc_simask = 0;
@@ -108,10 +57,6 @@ int interrupt_init (void)
 	/* Configure CPM interrupts */
 	cpm_interrupt_init ();
 
-	set_dec (decrementer_count);
-
-	set_msr (get_msr () | MSR_EE);
-
 	return (0);
 }
 
@@ -314,82 +259,36 @@ static void cpm_interrupt_init (void)
 
 /************************************************************************/
 
-volatile ulong timestamp = 0;
-
 /*
  * timer_interrupt - gets called when the decrementer overflows,
  * with interrupts disabled.
  * Trivial implementation - no need to be really accurate.
  */
-void timer_interrupt (struct pt_regs *regs)
+void timer_interrupt_cpu (struct pt_regs *regs)
 {
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 
-#ifdef CONFIG_STATUS_LED
-	extern void status_led_tick (ulong);
-#endif
 #if 0
 	printf ("*** Timer Interrupt *** ");
 #endif
 	/* Reset Timer Expired and Timers Interrupt Status */
 	immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
 	__asm__ ("nop");
-#ifdef CONFIG_MPC866_et_al
-	immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS;
-#else
-	immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
-#endif
-	/* Restore Decrementer Count */
-	set_dec (decrementer_count);
-
-	timestamp++;
-
-#ifdef CONFIG_STATUS_LED
-	status_led_tick (timestamp);
-#endif /* CONFIG_STATUS_LED */
-
-#if defined(CONFIG_WATCHDOG) || defined(CFG_CMA_LCD_HEARTBEAT)
-
 	/*
-	 * The shortest watchdog period of all boards (except LWMON)
-	 * is approx. 1 sec, thus re-trigger watchdog at least
-	 * every 500 ms = CFG_HZ / 2
-	 */
-#ifndef CONFIG_LWMON
-	if ((timestamp % (CFG_HZ / 2)) == 0) {
-#else
-	if ((timestamp % (CFG_HZ / 20)) == 0) {
-#endif
+	  Clear TEXPS (and TMIST on older chips). SPLSS (on older
+	  chips) is cleared too.
 
-#if defined(CFG_CMA_LCD_HEARTBEAT)
-		extern void lcd_heartbeat (void);
+	  Bitwise OR is a read-modify-write operation so ALL bits
+	  which are cleared by writing `1' would be cleared by
+	  operations like
 
-		lcd_heartbeat ();
-#endif /* CFG_CMA_LCD_HEARTBEAT */
+	  immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS;
 
-#if defined(CONFIG_WATCHDOG)
-		reset_8xx_watchdog (immr);
-#endif /* CONFIG_WATCHDOG */
-
-	}
-#endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
-}
-
-/************************************************************************/
-
-void reset_timer (void)
-{
-	timestamp = 0;
-}
-
-ulong get_timer (ulong base)
-{
-	return (timestamp - base);
-}
-
-void set_timer (ulong t)
-{
-	timestamp = t;
+	  The same can be achieved by simple writing of the PLPRCR
+	  to itself. If a bit value should be preserved, read the
+	  register, ZERO the bit and write, not OR, the result back.
+	*/
+	immr->im_clkrst.car_plprcr = immr->im_clkrst.car_plprcr;
 }
 
 /************************************************************************/