X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmpc85xx%2Fspd_sdram.c;h=abc63c414bd70a3f937906262b84718151bc65e6;hb=f58934551e052db5a1f33f53dcc9cbf6fcb72910;hp=90c3d444a8753a164fb90e6f47d7dc7d63974617;hpb=54a5070115eff38e9b324b78abdfa0b4520580b9;p=oweals%2Fu-boot.git

diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 90c3d444a8..abc63c414b 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -1071,19 +1071,9 @@ setup_laws_and_tlbs(unsigned int memsize)
 	ram_tlb_address = (unsigned int)CFG_DDR_SDRAM_BASE;
 	while (ram_tlb_address < (memsize * 1024 * 1024)
 	      && ram_tlb_index < 16) {
-		mtspr(MAS0, FSL_BOOKE_MAS0(1, ram_tlb_index, 0));
-		mtspr(MAS1, FSL_BOOKE_MAS1(1, 1, 0, 0, tlb_size));
-		mtspr(MAS2, FSL_BOOKE_MAS2(ram_tlb_address, 0));
-		mtspr(MAS3, FSL_BOOKE_MAS3(ram_tlb_address, 0,
-			(MAS3_SX|MAS3_SW|MAS3_SR)));
-		asm volatile("isync;msync;tlbwe;isync");
-
-		debug("DDR: MAS0=0x%08x\n", FSL_BOOKE_MAS0(1, ram_tlb_index, 0));
-		debug("DDR: MAS1=0x%08x\n", FSL_BOOKE_MAS1(1, 1, 0, 0, tlb_size));
-		debug("DDR: MAS2=0x%08x\n", FSL_BOOKE_MAS2(ram_tlb_address, 0));
-		debug("DDR: MAS3=0x%08x\n",
-			FSL_BOOKE_MAS3(ram_tlb_address, 0,
-			              (MAS3_SX|MAS3_SW|MAS3_SR)));
+		set_tlb(1, ram_tlb_address, ram_tlb_address,
+			MAS3_SX|MAS3_SW|MAS3_SR, 0,
+			0, ram_tlb_index, tlb_size, 1);
 
 		ram_tlb_address += (0x1000 << ((tlb_size - 1) * 2));
 		ram_tlb_index++;