X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmpc8260%2Fpci.c;h=82303644b2be6df407b296992f3c251f90e839eb;hb=ef50d6c06ece74fb17e8d7510e62cad9df8b810d;hp=b14fc159be3efb68bca5a912fa765d9529899d3e;hpb=681fc61c4cd3b2ef1fdd67224be8c4387fe533fd;p=oweals%2Fu-boot.git diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c index b14fc159be..82303644b2 100644 --- a/cpu/mpc8260/pci.c +++ b/cpu/mpc8260/pci.c @@ -33,6 +33,10 @@ #include #include #include +#ifdef CONFIG_OF_LIBFDT +#include +#include +#endif #if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 || defined CONFIG_PM826 DECLARE_GLOBAL_DATA_PTR; @@ -274,7 +278,8 @@ void pci_mpc8250_init (struct pci_controller *hose) | SIUMCR_CS10PC00 | SIUMCR_BCTLC00 | SIUMCR_MMR11; - +#elif defined(CONFIG_TQM8272) +/* nothing to do for this Board here */ #else /* * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), @@ -448,4 +453,12 @@ void pci_mpc8250_init (struct pci_controller *hose) immap->im_pci.pci_emr |= cpu_to_le32 (PCI_ERROR_PCI_NO_RSP); } +#if defined(CONFIG_OF_LIBFDT) +void ft_pci_setup(void *blob, bd_t *bd) +{ + do_fixup_by_prop_u32(blob, "device_type", "pci", 4, + "clock-frequency", gd->pci_clk, 1); +} +#endif + #endif /* CONFIG_PCI */