X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmpc8260%2Fcpu_init.c;h=36fc1eba5fd1014458fcf4d453a219eacf6e3d9c;hb=d61ea14885631e58a25feaa81ee82eb464c62d6a;hp=d0545cfcf2c7ce44ff8366b5a59f6db18db5f6d8;hpb=6dd652fa4d8591a32e2707a91f4582ed13011b17;p=oweals%2Fu-boot.git diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c index d0545cfcf2..36fc1eba5f 100644 --- a/cpu/mpc8260/cpu_init.c +++ b/cpu/mpc8260/cpu_init.c @@ -26,6 +26,12 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_BOARD_GET_CPU_CLK_F) +extern unsigned long board_get_cpu_clk_f (void); +#endif + static void config_8260_ioports (volatile immap_t * immr) { int portnum; @@ -70,13 +76,13 @@ static void config_8260_ioports (volatile immap_t * immr) uint tpmsk = ~pmsk; /* - * the (somewhat confused) paragraph at the - * bottom of page 35-5 warns that there might - * be "unknown behaviour" when programming - * PSORx and PDIRx, if PPARx = 1, so I - * decided this meant I had to disable the - * dedicated function first, and enable it - * last. + * the (somewhat confused) paragraph at the + * bottom of page 35-5 warns that there might + * be "unknown behaviour" when programming + * PSORx and PDIRx, if PPARx = 1, so I + * decided this meant I had to disable the + * dedicated function first, and enable it + * last. */ iop->ppar &= tpmsk; iop->psor = (iop->psor & tpmsk) | psor; @@ -88,6 +94,7 @@ static void config_8260_ioports (volatile immap_t * immr) } } +#define SET_VAL_MASK(a, b, mask) ((a & mask) | (b & ~mask)) /* * Breath some life into the CPU... * @@ -97,8 +104,12 @@ static void config_8260_ioports (volatile immap_t * immr) */ void cpu_init_f (volatile immap_t * immr) { - DECLARE_GLOBAL_DATA_PTR; - +#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ + uint sccr; +#endif +#if defined(CONFIG_BOARD_GET_CPU_CLK_F) + unsigned long cpu_clk; +#endif volatile memctl8260_t *memctl = &immr->im_memctl; extern void m8260_cpm_reset (void); @@ -116,10 +127,27 @@ void cpu_init_f (volatile immap_t * immr) immr->im_clkrst.car_rmr = CFG_RMR; /* BCR - Bus Configuration Register (4-25) */ +#if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE) + if (immr->im_siu_conf.sc_bcr & BCR_EBM) { + immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_60x, 0x80000010); + } else { + immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_SINGLE, 0x80000010); + } +#else immr->im_siu_conf.sc_bcr = CFG_BCR; +#endif /* SIUMCR - contains debug pin configuration (4-31) */ +#if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH) + cpu_clk = board_get_cpu_clk_f (); + if (cpu_clk >= 100000000) { + immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_HIGH, 0x9f3cc000); + } else { + immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_LOW, 0x9f3cc000); + } +#else immr->im_siu_conf.sc_siumcr = CFG_SIUMCR; +#endif config_8260_ioports (immr); @@ -131,7 +159,10 @@ void cpu_init_f (volatile immap_t * immr) #if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ /* System clock control register (9-8) */ - immr->im_clkrst.car_sccr = CFG_SCCR; + sccr = immr->im_clkrst.car_sccr & + (SCCR_PCI_MODE | SCCR_PCI_MODCK | SCCR_PCIDF_MSK); + immr->im_clkrst.car_sccr = sccr | + (CFG_SCCR & ~(SCCR_PCI_MODE | SCCR_PCI_MODCK | SCCR_PCIDF_MSK) ); #endif /* !CONFIG_COGENT */ /* @@ -151,7 +182,8 @@ void cpu_init_f (volatile immap_t * immr) #endif /* now restrict to preliminary range */ - memctl->memc_br0 = CFG_BR0_PRELIM; + /* the PS came from the HRCW, donĀ“t change it */ + memctl->memc_br0 = SET_VAL_MASK(memctl->memc_br0 , CFG_BR0_PRELIM, BRx_PS_MSK); memctl->memc_or0 = CFG_OR0_PRELIM; #if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM) @@ -217,8 +249,6 @@ void cpu_init_f (volatile immap_t * immr) */ int cpu_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) gd->bd->bi_immr_base; immr->im_cpm.cp_rccr = CFG_RCCR; @@ -231,8 +261,6 @@ int cpu_init_r (void) */ int prt_8260_rsr (void) { - DECLARE_GLOBAL_DATA_PTR; - static struct { ulong mask; char *desc;