X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmpc5xxx%2Fpci_mpc5200.c;h=a3251abf58d80a7eb715919c4aa00ede7f0bbf5f;hb=f85cd46918241842546e5021d0b88db2be50a048;hp=2f01d5ce996279e675a7e3398f4db5d8fac427f7;hpb=7a635e004ec12bd2a0bae9f90fbb5769b524a42e;p=oweals%2Fu-boot.git

diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c
index 2f01d5ce99..a3251abf58 100644
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -31,8 +31,8 @@
 #include <mpc5xxx.h>
 
 /* System RAM mapped over PCI */
-#define CONFIG_PCI_MEMORY_BUS	CFG_SDRAM_BASE
-#define CONFIG_PCI_MEMORY_PHYS	CFG_SDRAM_BASE
+#define CONFIG_PCI_MEMORY_BUS	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_MEMORY_PHYS	CONFIG_SYS_SDRAM_BASE
 #define CONFIG_PCI_MEMORY_SIZE	(1024 * 1024 * 1024)
 
 /* PCIIWCR bit fields */
@@ -125,11 +125,11 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
 
 	/* Set cache line size */
 	*(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) |
-		(CFG_CACHELINE_SIZE / 4);
+		(CONFIG_SYS_CACHELINE_SIZE / 4);
 
 	/* Map MBAR to PCI space */
-	*(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR;
-	*(vu_long *)MPC5XXX_PCI_TBATR0 = CFG_MBAR | 1;
+	*(vu_long *)MPC5XXX_PCI_BAR0 = CONFIG_SYS_MBAR;
+	*(vu_long *)MPC5XXX_PCI_TBATR0 = CONFIG_SYS_MBAR | 1;
 
 	/* Map RAM to PCI space */
 	*(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3);