X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmips%2Fcpu.c;h=8b43d8eb36281c0522e58649c852c0e28d96151a;hb=3596d55eb22703d3f4f1b839fe4b000fabe081b3;hp=3fc3916b4e917c3d61676f1e53dd714124344050;hpb=c021880ac5837154ca51b9d84e6b75f39b64aabe;p=oweals%2Fu-boot.git diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index 3fc3916b4e..8b43d8eb36 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -23,19 +23,53 @@ #include #include -#include +#include +#include +#include + +#define cache_op(op,addr) \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noreorder \n" \ + " .set mips3\n\t \n" \ + " cache %0, %1 \n" \ + " .set pop \n" \ + : \ + : "i" (op), "R" (*(unsigned char *)(addr))) + +void __attribute__((weak)) _machine_restart(void) +{ +} int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -#ifdef CONFIG_INCA_IP - *INCA_IP_WDT_RST_REQ = 0x3f; -#endif + _machine_restart(); + fprintf(stderr, "*** reset failed ***\n"); return 0; } -void flush_cache (ulong start_addr, ulong size) +void flush_cache(ulong start_addr, ulong size) { + unsigned long lsize = CFG_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); + while (1) { + cache_op(Hit_Writeback_Inv_D, start_addr); + cache_op(Hit_Invalidate_I, start_addr); + if (addr == aend) + break; + addr += lsize; + } } +void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) +{ + write_32bit_cp0_register(CP0_ENTRYLO0, low0); + write_32bit_cp0_register(CP0_PAGEMASK, pagemask); + write_32bit_cp0_register(CP0_ENTRYLO1, low1); + write_32bit_cp0_register(CP0_ENTRYHI, hi); + write_32bit_cp0_register(CP0_INDEX, index); + tlb_write_indexed(); +}