X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmips%2Fasc_serial.c;h=be686c2ae8ddbb5e0fc0594f0998cf3b19289da1;hb=9863d6aca11405e1e0d8aba2045d78aeec4d4ee7;hp=d95ec3fd2fc27de91e4c4bf03f115834b0b5edd1;hpb=5da627a424b3ad2d38a81886ba4a18e5123a6788;p=oweals%2Fu-boot.git diff --git a/cpu/mips/asc_serial.c b/cpu/mips/asc_serial.c index d95ec3fd2f..be686c2ae8 100644 --- a/cpu/mips/asc_serial.c +++ b/cpu/mips/asc_serial.c @@ -4,8 +4,6 @@ #include -#if defined(CONFIG_PURPLE) || defined(CONFIG_INCA_IP) - #ifdef CONFIG_PURPLE #define serial_init asc_serial_init #define serial_putc asc_serial_putc @@ -34,10 +32,10 @@ /* Interrupt status register bits */ #define FBS_ISR_AT 0x00000040 /* ASC transmit interrupt */ -#define FBS_ISR_AR 0x00000020 /* ASC receive interrupt */ +#define FBS_ISR_AR 0x00000020 /* ASC receive interrupt */ #define FBS_ISR_AE 0x00000010 /* ASC error interrupt */ #define FBS_ISR_AB 0x00000008 /* ASC transmit buffer interrupt */ -#define FBS_ISR_AS 0x00000004 /* ASC start of autobaud detection interrupt */ +#define FBS_ISR_AS 0x00000004 /* ASC start of autobaud detection interrupt */ #define FBS_ISR_AF 0x00000002 /* ASC end of autobaud detection interrupt */ #else @@ -368,4 +366,3 @@ int serial_tstc (void) return res; } -#endif /* CONFIG_PURPLE || CONFIG_INCA_IP */