X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmcf52x2%2Fstart.S;h=7c9a7d2d2bd786939eb6b7db127e1481f54fd897;hb=f2b07ebd32e42a5b1126c98efc768ddb8908de62;hp=9a13491fbd3b3d65ea0116cf247d212a24320190;hpb=9acb626fc145e7327f94fd77f927dce08dd978a8;p=oweals%2Fu-boot.git

diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 9a13491fbd..7c9a7d2d2b 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -54,12 +54,16 @@
  *	These vectors are to catch any un-intended traps.
  */
 _vectors:
- .long	0x00000000
-#ifndef CONFIG_M5282
-.long	_START
-#else
+
+.long	0x00000000		/* Flash offset is 0 until we setup CS0 */
+#if defined(CONFIG_R5200)
+.long	0x400
+#elif defined(CONFIG_M5282)
 .long	_start - TEXT_BASE
+#else
+.long	_START
 #endif
+
 .long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 .long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 .long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
@@ -131,7 +135,7 @@ _start:
 	movec	%d0, %RAMBAR0
 #endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
 
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
 	/* Initialize IPSBAR */
 	move.l	#(CFG_MBAR + 1), %d0		/* set IPSBAR address + valid flag */
 	move.l	%d0, 0x40000000
@@ -140,6 +144,7 @@ _start:
 	move.l	#(CFG_INIT_RAM_ADDR + 0x21), %d0
 	movec	%d0, %RAMBAR1
 
+#if defined(CONFIG_M5282)
 #if (TEXT_BASE == CFG_INT_FLASH_BASE)
 	/* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
 
@@ -166,6 +171,7 @@ _after_flashbar_copy:
 	movec	%d0, %RAMBAR0
 #endif /* (TEXT_BASE == CFG_INT_FLASH_BASE) */
 
+#endif
 #endif
 	/* if we come from a pre-loader we have no exception table and
 	 * therefore no VBR to set
@@ -175,12 +181,26 @@ _after_flashbar_copy:
 	movec	%d0, %VBR
 #endif
 
+#ifdef	CONFIG_R5200
+	move.l	#(_flash_setup-CFG_FLASH_BASE), %a0
+	move.l	#(_flash_setup_end-CFG_FLASH_BASE), %a1
+	move.l	#(CFG_INIT_RAM_ADDR), %a2
+_copy_flash:
+	move.l	(%a0)+, (%a2)+
+	cmp.l	%a0, %a1
+	bgt.s	_copy_flash
+	jmp	CFG_INIT_RAM_ADDR
+_after_flash_copy:
+#endif
+
+#if 0
 	/* invalidate and disable cache */
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
 	move.l	#0, %d0
 	movec	%d0, %ACR0
 	movec	%d0, %ACR1
+#endif
 
 	/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
 	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
@@ -191,9 +211,28 @@ _after_flashbar_copy:
 	bsr cpu_init_f				/* run low-level CPU init code (from flash) */
 	bsr board_init_f			/* run low-level board init code (from flash) */
 
-	/* board_init_f() does not return
+	/* board_init_f() does not return */
 
 /*------------------------------------------------------------------------------*/
+
+#ifdef	CONFIG_R5200
+_flash_setup:
+	/* CSAR0 */
+	move.l	#((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
+	move.w	%d0, 0x40000080
+
+	/* CSCR0 */
+	move.l	#0x2180, %d0		/* 8 wait states, 16bit port, auto ack,  */
+	move.w	%d0, 0x4000008A
+
+	/* CSMR0 */
+	move.l	#0x001f0001, %d0	/* 2 MB, valid */
+	move.l	%d0, 0x40000084
+
+	jmp	_after_flash_copy.L
+_flash_setup_end:
+#endif
+
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *