X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmcf52x2%2Fspeed.c;h=b485e1cccc129516c50acb3080bd1ec006f04762;hb=0e1ac981194aa0d92eff0934442cec48a4f57834;hp=f6edd5b6fa81fa2bdaa6946bfc34567f91ecb1fc;hpb=4b326101d6cfaeab8250988bc4c7f51e6c92d719;p=oweals%2Fu-boot.git diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c index f6edd5b6fa..b485e1cccc 100644 --- a/cpu/mcf52x2/speed.c +++ b/cpu/mcf52x2/speed.c @@ -30,20 +30,25 @@ DECLARE_GLOBAL_DATA_PTR; -/* - * get_clocks() fills in gd->cpu_clock and gd->bus_clk - */ +/* get_clocks() fills in gd->cpu_clock and gd->bus_clk */ int get_clocks (void) { +#if defined(CONFIG_M5208) + volatile pll_t *pll = (pll_t *) MMAP_PLL; + + pll->odr = CONFIG_SYS_PLL_ODR; + pll->fdr = CONFIG_SYS_PLL_FDR; +#endif + #if defined(CONFIG_M5249) || defined(CONFIG_M5253) volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR); unsigned long pllcr; -#ifndef CFG_PLL_BYPASS +#ifndef CONFIG_SYS_PLL_BYPASS #ifdef CONFIG_M5249 /* Setup the PLL to run at the specified speed */ -#ifdef CFG_FAST_CLK +#ifdef CONFIG_SYS_FAST_CLK pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */ #else pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */ @@ -51,7 +56,7 @@ int get_clocks (void) #endif /* CONFIG_M5249 */ #ifdef CONFIG_M5253 - pllcr = CFG_PLLCR; + pllcr = CONFIG_SYS_PLLCR; #endif /* CONFIG_M5253 */ cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */ @@ -60,7 +65,7 @@ int get_clocks (void) pllcr ^= 0x00000001; /* Set pll bypass to 1 */ mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */ udelay(0x20); /* Wait for a lock ... */ -#endif /* #ifndef CFG_PLL_BYPASS */ +#endif /* #ifndef CONFIG_SYS_PLL_BYPASS */ #endif /* CONFIG_M5249 || CONFIG_M5253 */ @@ -76,11 +81,20 @@ int get_clocks (void) ; #endif - gd->cpu_clk = CFG_CLK; -#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || defined(CONFIG_M5275) + gd->cpu_clk = CONFIG_SYS_CLK; +#if defined(CONFIG_M5208) || defined(CONFIG_M5249) || defined(CONFIG_M5253) || \ + defined(CONFIG_M5271) || defined(CONFIG_M5275) gd->bus_clk = gd->cpu_clk / 2; #else gd->bus_clk = gd->cpu_clk; #endif + +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#ifdef CONFIG_SYS_I2C2_OFFSET + gd->i2c2_clk = gd->bus_clk; +#endif +#endif + return (0); }