X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmcf52x2%2Fcpu.c;h=32d6c40da081620a8c58533da7ac1837c163ece1;hb=45627fce18139a74e0755124d27376b520db156c;hp=71ea408aa5e2e359ee94c84a7ef8c539583bc7b5;hpb=93f798346033a1f6d22090b47abad4be88243b04;p=oweals%2Fu-boot.git diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c index 71ea408aa5..32d6c40da0 100644 --- a/cpu/mcf52x2/cpu.c +++ b/cpu/mcf52x2/cpu.c @@ -6,6 +6,9 @@ * (C) Copyright 2005 * BuS Elektronik GmbH & Co. KG * + * MCF5275 additions + * Copyright (C) 2008 Arthur Shipkowski (art@videon-central.com) + * * See file CREDITS for list of people who contributed to this * project. * @@ -29,6 +32,7 @@ #include #include #include +#include #ifdef CONFIG_M5271 /* @@ -62,11 +66,11 @@ int checkcpu(void) if (cpu_model) printf("CPU: Freescale ColdFire MCF%s rev. %hu, at %s MHz\n", - cpu_model, prn, strmhz(buf, CFG_CLK)); + cpu_model, prn, strmhz(buf, CONFIG_SYS_CLK)); else printf("CPU: Unknown - Freescale ColdFire MCF5271 family" " (PIN: 0x%x) rev. %hu, at %s MHz\n", - pin, prn, strmhz(buf, CFG_CLK)); + pin, prn, strmhz(buf, CONFIG_SYS_CLK)); return 0; } @@ -170,7 +174,7 @@ int watchdog_init(void) /* set timeout and enable watchdog */ wdt->wdog_wrrr = - ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1; + ((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1; wdt->wdog_wcr = 0; /* reset watchdog counter */ puts("WATCHDOG:enabled\n"); @@ -180,6 +184,69 @@ int watchdog_init(void) #endif /* #ifdef CONFIG_M5272 */ +#ifdef CONFIG_M5275 +int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +{ + volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM); + + udelay(1000); + + rcm->rcr = RCM_RCR_SOFTRST; + + /* we don't return! */ + return 0; +}; + +int checkcpu(void) +{ + char buf[32]; + + printf("CPU: Freescale Coldfire MCF5275 at %s MHz\n", + strmhz(buf, CONFIG_SYS_CLK)); + return 0; +}; + + +#if defined(CONFIG_WATCHDOG) +/* Called by macro WATCHDOG_RESET */ +void watchdog_reset(void) +{ + volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG); + wdt->wsr = 0x5555; + wdt->wsr = 0xAAAA; +} + +int watchdog_disable(void) +{ + volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG); + + wdt->wsr = 0x5555; /* reset watchdog counter */ + wdt->wsr = 0xAAAA; + wdt->wcr = 0; /* disable watchdog timer */ + + puts("WATCHDOG:disabled\n"); + return (0); +} + +int watchdog_init(void) +{ + volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG); + + wdt->wcr = 0; /* disable watchdog */ + + /* set timeout and enable watchdog */ + wdt->wmr = + ((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1; + wdt->wsr = 0x5555; /* reset watchdog counter */ + wdt->wsr = 0xAAAA; + + puts("WATCHDOG:enabled\n"); + return (0); +} +#endif /* #ifdef CONFIG_WATCHDOG */ + +#endif /* #ifdef CONFIG_M5275 */ + #ifdef CONFIG_M5282 int checkcpu(void) { @@ -211,7 +278,7 @@ int checkcpu(void) char buf[32]; printf("CPU: Freescale Coldfire MCF5249 at %s MHz\n", - strmhz(buf, CFG_CLK)); + strmhz(buf, CONFIG_SYS_CLK)); return 0; } @@ -233,7 +300,7 @@ int checkcpu(void) unsigned char resetsource = mbar_readLong(SIM_RSR); printf("CPU: Freescale Coldfire MCF5253 at %s MHz\n", - strmhz(buf, CFG_CLK)); + strmhz(buf, CONFIG_SYS_CLK)); if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) { printf("Reset:%s%s\n", @@ -255,3 +322,15 @@ int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) return 0; }; #endif + +#if defined(CONFIG_MCFFEC) +/* Default initializations for MCFFEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +int cpu_eth_init(bd_t *bis) +{ + return mcffec_initialize(bis); +} +#endif