X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fmcf52x2%2Fcpu.c;h=2cfe6311d08863606207db7f686b7ab84eb76a59;hb=d30f9043539d372cf66406bc2f21bb8c20e67009;hp=167097a797d80d50b5fd6bfde7fdcf6cb25f8ef2;hpb=89973f8a82c28ad893c4c3cc56839a8e10fe5f13;p=oweals%2Fu-boot.git

diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index 167097a797..2cfe6311d0 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -34,6 +34,72 @@
 #include <asm/immap.h>
 #include <netdev.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef	CONFIG_M5208
+int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+{
+	volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
+
+	udelay(1000);
+
+	rcm->rcr = RCM_RCR_SOFTRST;
+
+	/* we don't return! */
+	return 0;
+};
+
+int checkcpu(void)
+{
+	char buf1[32], buf2[32];
+
+	printf("CPU:   Freescale Coldfire MCF5208\n"
+	       "       CPU CLK %s MHz BUS CLK %s MHz\n",
+	       strmhz(buf1, gd->cpu_clk),
+	       strmhz(buf2, gd->bus_clk));
+	return 0;
+};
+
+#if defined(CONFIG_WATCHDOG)
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+	volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+	wdt->sr = 0x5555;
+	wdt->sr = 0xAAAA;
+}
+
+int watchdog_disable(void)
+{
+	volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+
+	wdt->sr = 0x5555; /* reset watchdog counteDECLARE_GLOBAL_DATA_PTR;
+r */
+	wdt->sr = 0xAAAA;
+	wdt->cr = 0;	/* disable watchdog timer */
+
+	puts("WATCHDOG:disabled\n");
+	return (0);
+}
+
+int watchdog_init(void)
+{
+	volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+
+	wdt->cr = 0;	/* disable watchdog */
+
+	/* set timeout and enable watchdog */
+	wdt->mr =
+		((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1;
+	wdt->sr = 0x5555; /* reset watchdog counter */
+	wdt->sr = 0xAAAA;
+
+	puts("WATCHDOG:enabled\n");
+	return (0);
+}
+#endif				/* #ifdef CONFIG_WATCHDOG */
+#endif				/* #ifdef CONFIG_M5208 */
+
 #ifdef  CONFIG_M5271
 /*
  * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
@@ -66,11 +132,11 @@ int checkcpu(void)
 
 	if (cpu_model)
 		printf("CPU:   Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
-		       cpu_model, prn, strmhz(buf, CFG_CLK));
+		       cpu_model, prn, strmhz(buf, CONFIG_SYS_CLK));
 	else
 		printf("CPU:   Unknown - Freescale ColdFire MCF5271 family"
 		       " (PIN: 0x%x) rev. %hu, at %s MHz\n",
-		       pin, prn, strmhz(buf, CFG_CLK));
+		       pin, prn, strmhz(buf, CONFIG_SYS_CLK));
 
 	return 0;
 }
@@ -174,7 +240,7 @@ int watchdog_init(void)
 
 	/* set timeout and enable watchdog */
 	wdt->wdog_wrrr =
-	    ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
+	    ((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1;
 	wdt->wdog_wcr = 0;	/* reset watchdog counter */
 
 	puts("WATCHDOG:enabled\n");
@@ -202,7 +268,7 @@ int checkcpu(void)
 	char buf[32];
 
 	printf("CPU:   Freescale Coldfire MCF5275 at %s MHz\n",
-			strmhz(buf, CFG_CLK));
+			strmhz(buf, CONFIG_SYS_CLK));
 	return 0;
 };
 
@@ -236,7 +302,7 @@ int watchdog_init(void)
 
 	/* set timeout and enable watchdog */
 	wdt->wmr =
-		((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
+		((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1;
 	wdt->wsr = 0x5555; /* reset watchdog counter */
 	wdt->wsr = 0xAAAA;
 
@@ -278,7 +344,7 @@ int checkcpu(void)
 	char buf[32];
 
 	printf("CPU:   Freescale Coldfire MCF5249 at %s MHz\n",
-	       strmhz(buf, CFG_CLK));
+	       strmhz(buf, CONFIG_SYS_CLK));
 	return 0;
 }
 
@@ -300,7 +366,7 @@ int checkcpu(void)
 
 	unsigned char resetsource = mbar_readLong(SIM_RSR);
 	printf("CPU:   Freescale Coldfire MCF5253 at %s MHz\n",
-	       strmhz(buf, CFG_CLK));
+	       strmhz(buf, CONFIG_SYS_CLK));
 
 	if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
 		printf("Reset:%s%s\n",
@@ -334,4 +400,3 @@ int cpu_eth_init(bd_t *bis)
 	return mcffec_initialize(bis);
 }
 #endif
-