X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Fixp%2Fstart.S;h=196ba5db2eaf760c750b1c4a8b0ac41ea18b1cf6;hb=9eb468da3fd8753de55ab271d6ff5ed7f36d7ea2;hp=d5fc9bf642546bf31e8baa07a6cec74f088e3b79;hpb=42d1f0394bef0624fc9664714d54bb137931d6a6;p=oweals%2Fu-boot.git diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S index d5fc9bf642..196ba5db2e 100644 --- a/cpu/ixp/start.S +++ b/cpu/ixp/start.S @@ -101,42 +101,15 @@ _armboot_start: .word _start /* - * Note: _armboot_end_data and _armboot_end are defined - * by the (board-dependent) linker script. - * _armboot_end_data is the first usable FLASH address after armboot - */ -.globl _armboot_end_data -_armboot_end_data: - .word armboot_end_data -.globl _armboot_end -_armboot_end: - .word armboot_end - -/* - * This is defined in the board specific linker script + * These are defined in the board-specific linker script. */ .globl _bss_start _bss_start: - .word bss_start + .word __bss_start .globl _bss_end _bss_end: - .word bss_end - -/* - * _armboot_real_end is the first usable RAM address behind armboot - * and the various stacks - */ -.globl _armboot_real_end -_armboot_real_end: - .word 0x0badc0de - -/* - * We relocate uboot to this address (end of RAM - 128 KiB) - */ -.globl _uboot_reloc -_uboot_reloc: - .word TEXT_BASE + .word _end #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ @@ -167,7 +140,7 @@ reset: CPWAIT r0 /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 + mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 /* drain write and fill buffers */ @@ -181,33 +154,34 @@ reset: CPWAIT r0 /* set EXP CS0 to the optimum timing */ - ldr r1, =CFG_EXP_CS0 + ldr r1, =CONFIG_SYS_EXP_CS0 ldr r2, =IXP425_EXP_CS0 str r1, [r2] /* make sure flash is visible at 0 */ - ldr r2, =IXP425_EXP_CFG0 +#if 0 + ldr r2, =IXP425_EXP_CFG0 ldr r1, [r2] orr r1, r1, #0x80000000 str r1, [r2] - - mov r1, #CFG_SDR_CONFIG +#endif + mov r1, #CONFIG_SYS_SDR_CONFIG ldr r2, =IXP425_SDR_CONFIG str r1, [r2] /* disable refresh cycles */ - mov r1, #0 + mov r1, #0 ldr r3, =IXP425_SDR_REFRESH str r1, [r3] /* send nop command */ - mov r1, #3 + mov r1, #3 ldr r4, =IXP425_SDR_IR str r1, [r4] DELAY_FOR 0x4000, r0 /* set SDRAM internal refresh val */ - ldr r1, =CFG_SDRAM_REFRESH_CNT + ldr r1, =CONFIG_SYS_SDRAM_REFRESH_CNT str r1, [r3] DELAY_FOR 0x4000, r0 @@ -225,7 +199,7 @@ reset: bne 111b /* set mode register in sdram */ - mov r1, #1 + mov r1, #CONFIG_SYS_SDR_MODE_CONFIG str r1, [r4] DELAY_FOR 0x4000, r0 @@ -237,7 +211,7 @@ reset: /* copy */ mov r0, #0 mov r4, r0 - add r2, r0, #0x40000 + add r2, r0, #CONFIG_SYS_MONITOR_LEN mov r1, #0x10000000 mov r5, r1 @@ -252,7 +226,7 @@ reset: CPWAIT r0 /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 + mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 /* drain write and fill buffers */ @@ -260,7 +234,7 @@ reset: CPWAIT r0 /* move flash to 0x50000000 */ - ldr r2, =IXP425_EXP_CFG0 + ldr r2, =IXP425_EXP_CFG0 ldr r1, [r2] bic r1, r1, #0x80000000 str r1, [r2] @@ -273,7 +247,7 @@ reset: nop /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 + mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 /* enable I cache */ @@ -287,6 +261,7 @@ reset: orr r0,r0,#0x13 msr cpsr,r0 +#ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ @@ -294,7 +269,7 @@ relocate: /* relocate U-Boot to RAM */ beq stack_setup ldr r2, _armboot_start - ldr r3, _armboot_end + ldr r3, _bss_start sub r2, r3, r2 /* r2 <- size of armboot */ add r2, r0, r2 /* r2 <- source end address */ @@ -303,28 +278,27 @@ copy_loop: stmia r1!, {r3-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop +#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ /* Set up the stack */ - stack_setup: - - ldr r0, _uboot_reloc /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CFG_MALLOC_LEN /* malloc area */ - /* FIXME: bdinfo should be here */ + ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ + sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ + sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ +#ifdef CONFIG_USE_IRQ + sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) +#endif sub sp, r0, #12 /* leave 3 words for abort-stack */ clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - add r0, r0, #4 /* start at first byte of bss */ ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ + mov r2, #0x00000000 /* clear */ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 - bne clbss_l - + ble clbss_l ldr pc, _start_armboot @@ -370,9 +344,9 @@ _start_armboot: .word start_armboot stmia sp, {r0 - r12} /* Calling r0-r12 */ add r8, sp, #S_PC - ldr r2, _armboot_end - add r2, r2, #CONFIG_STACKSIZE - sub r2, r2, #8 + ldr r2, _armboot_start + sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) + sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */ add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */ @@ -407,9 +381,9 @@ _start_armboot: .word start_armboot .endm .macro get_bad_stack - ldr r13, _armboot_end @ setup our mode stack - add r13, r13, #CONFIG_STACKSIZE @ resides at top of normal stack - sub r13, r13, #8 + ldr r13, _armboot_start @ setup our mode stack + sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) + sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack str lr, [r13] @ save caller lr / spsr mrs lr, spsr @@ -508,13 +482,13 @@ fiq: .globl reset_cpu reset_cpu: - ldr r1, =0x482e + ldr r1, =0x482e ldr r2, =IXP425_OSWK str r1, [r2] - ldr r1, =0x0fff + ldr r1, =0x0fff ldr r2, =IXP425_OSWT str r1, [r2] - ldr r1, =0x5 + ldr r1, =0x5 ldr r2, =IXP425_OSWE str r1, [r2] b reset_endless @@ -523,3 +497,29 @@ reset_cpu: reset_endless: b reset_endless + +#ifdef CONFIG_USE_IRQ + +.LC0: .word loops_per_jiffy + +/* + * 0 <= r0 <= 2000 + */ +.globl udelay +udelay: + mov r2, #0x6800 + orr r2, r2, #0x00db + mul r0, r2, r0 + ldr r2, .LC0 + ldr r2, [r2] @ max = 0x0fffffff + mov r0, r0, lsr #11 @ max = 0x00003fff + mov r2, r2, lsr #11 @ max = 0x0003ffff + mul r0, r2, r0 @ max = 2^32-1 + movs r0, r0, lsr #6 + +delay_loop: + subs r0, r0, #1 + bne delay_loop + mov pc, lr + +#endif /* CONFIG_USE_IRQ */