X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Farm926ejs%2Fstart.S;h=297efe07c26fd5d50674f4060f0685ab2e371b8d;hb=5e3dca577b7c1bf58bd2b48449b18b7e7dcd8e04;hp=dd26a6bf09354aab19dd649fe6b276c21080230c;hpb=b0639ca33214eedeb026ce45ad1871d477cdbfb8;p=oweals%2Fu-boot.git diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S index dd26a6bf09..297efe07c2 100644 --- a/cpu/arm926ejs/start.S +++ b/cpu/arm926ejs/start.S @@ -3,7 +3,7 @@ * * Copyright (c) 2003 Texas Instruments * - * ----- Adapted for OMAP1610 from ARM925t code ------ + * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ * * Copyright (c) 2001 Marius Gröger * Copyright (c) 2002 Alex Züpke @@ -31,12 +31,13 @@ */ - #include #include #if defined(CONFIG_OMAP1610) #include <./configs/omap1510.h> +#elif defined(CONFIG_OMAP730) +#include <./configs/omap730.h> #endif /* @@ -98,24 +99,15 @@ _armboot_start: .word _start /* - * Note: _armboot_end_data and _armboot_end are defined - * by the (board-dependent) linker script. - * _armboot_end_data is the first usable FLASH address after armboot + * These are defined in the board-specific linker script. */ -.globl _armboot_end_data -_armboot_end_data: - .word armboot_end_data -.globl _armboot_end -_armboot_end: - .word armboot_end +.globl _bss_start +_bss_start: + .word __bss_start -/* - * _armboot_real_end is the first usable RAM address behind armboot - * and the various stacks - */ -.globl _armboot_real_end -_armboot_real_end: - .word 0x0badc0de +.globl _bss_end +_bss_end: + .word _end #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ @@ -143,57 +135,55 @@ reset: orr r0,r0,#0xd3 msr cpsr,r0 - - /* - * turn off the watchdog, unlock/diable sequence - */ - mov r1, #0xF5 - ldr r0, =WDTIM_MODE - strh r1, [r0] - mov r1, #0xA0 - strh r1, [r0] - - - - - /* - * mask all IRQs by setting all bits in the INTMR - default + * we do sys-critical inits only at reboot, + * not when booting from ram! */ - - mov r1, #0xffffffff - ldr r0, =REG_IHL1_MIR - str r1, [r0] - ldr r0, =REG_IHL2_MIR - str r1, [r0] +#ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_crit +#endif + +#ifndef CONFIG_SKIP_RELOCATE_UBOOT +relocate: /* relocate U-Boot to RAM */ + adr r0, _start /* r0 <- current position of code */ + ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ + cmp r0, r1 /* don't reloc during debug */ + beq stack_setup -relocate: - /* - * relocate armboot to RAM - */ - adr r0, _start /* r0 <- current position of code */ ldr r2, _armboot_start - ldr r3, _armboot_end - sub r2, r3, r2 /* r2 <- size of armboot */ - ldr r1, _TEXT_BASE /* r1 <- destination address */ - add r2, r0, r2 /* r2 <- source end address */ + ldr r3, _bss_start + sub r2, r3, r2 /* r2 <- size of armboot */ + add r2, r0, r2 /* r2 <- source end address */ - /* - * r0 = source address - * r1 = target address - * r2 = source end address - */ copy_loop: - ldmia r0!, {r3-r10} - stmia r1!, {r3-r10} - cmp r0, r2 + ldmia r0!, {r3-r10} /* copy from source address [r0] */ + stmia r1!, {r3-r10} /* copy to target address [r1] */ + cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop +#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ + + /* Set up the stack */ +stack_setup: + ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ + sub r0, r0, #CFG_MALLOC_LEN /* malloc area */ + sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */ +#ifdef CONFIG_USE_IRQ + sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) +#endif + sub sp, r0, #12 /* leave 3 words for abort-stack */ + +clear_bss: + ldr r0, _bss_start /* find start of bss segment */ + ldr r1, _bss_end /* stop here */ + mov r2, #0x00000000 /* clear */ + +clbss_l:str r2, [r0] /* clear loop... */ + add r0, r0, #4 + cmp r0, r1 + ble clbss_l - /* set up the stack */ - ldr r0, _armboot_end - add r0, r0, #CONFIG_STACKSIZE - sub sp, r0, #12 /* leave 3 words for abort-stack */ + bl coloured_LED_init + bl red_LED_on ldr pc, _start_armboot @@ -211,8 +201,7 @@ _start_armboot: * ************************************************************************* */ - - +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * flush v4 I/D caches @@ -235,9 +224,11 @@ cpu_init_crit: * Go setup Memory and board specific bits prior to relocation. */ mov ip, lr /* perserve link reg across call */ - bl platformsetup /* go setup pll,mux,memory */ + bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ mov pc, lr /* back to my caller */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + /* ************************************************************************* * @@ -283,9 +274,10 @@ cpu_init_crit: @ carve out a frame on current user stack sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 - ldr r2, _armboot_end @ find top of stack - add r2, r2, #CONFIG_STACKSIZE @ find base of normal stack - sub r2, r2, #8 @ set base 2 words into abort stack + + ldr r2, _armboot_start + sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) + sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -317,11 +309,9 @@ cpu_init_crit: .endm .macro get_bad_stack - @ get bottom of stack (into sp by by user stack pointer). - ldr r13, _armboot_end - @ head to reserved words at the top of the stack - add r13, r13, #CONFIG_STACKSIZE - sub r13, r13, #8 @ reserved a couple spots in abort stack + ldr r13, _armboot_start @ setup our mode stack + sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) + sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr @@ -406,18 +396,3 @@ fiq: bl do_fiq #endif - - .align 5 -.globl reset_cpu -reset_cpu: - ldr r1, rstctl1 /* get clkm1 reset ctl */ - mov r3, #0x0 - strh r3, [r1] /* clear it */ - mov r3, #0x8 - strh r3, [r1] /* force dsp+arm reset */ -_loop_forever: - b _loop_forever - - -rstctl1: - .word 0xfffece10