X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2Farm920t%2Fcpu.c;h=be82c87c7dd70706851d606cee084c9a07e0ad15;hb=8f0fec74ac6d0f3a7134ccebafa1ed9bd8c712ba;hp=f93bf57e2b47fe6a79be27372e039d726e0ed5ef;hpb=7a635e004ec12bd2a0bae9f90fbb5769b524a42e;p=oweals%2Fu-boot.git

diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c
index f93bf57e2b..be82c87c7d 100644
--- a/cpu/arm920t/cpu.c
+++ b/cpu/arm920t/cpu.c
@@ -4,7 +4,7 @@
  * Marius Groeger <mgroeger@sysgo.de>
  *
  * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -31,75 +31,13 @@
 
 #include <common.h>
 #include <command.h>
-#include <arm920t.h>
+#include <asm/system.h>
 
-#ifdef CONFIG_USE_IRQ
-DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_AT91_LEGACY
+#warning Your board is using legacy AT91RM9200 SoC access. Please update!
 #endif
 
-/* read co-processor 15, register #1 (control register) */
-static unsigned long read_p15_c1 (void)
-{
-	unsigned long value;
-
-	__asm__ __volatile__(
-		"mrc	p15, 0, %0, c1, c0, 0   @ read control reg\n"
-		: "=r" (value)
-		:
-		: "memory");
-
-#ifdef MMU_DEBUG
-	printf ("p15/c1 is = %08lx\n", value);
-#endif
-	return value;
-}
-
-/* write to co-processor 15, register #1 (control register) */
-static void write_p15_c1 (unsigned long value)
-{
-#ifdef MMU_DEBUG
-	printf ("write %08lx to p15/c1\n", value);
-#endif
-	__asm__ __volatile__(
-		"mcr	p15, 0, %0, c1, c0, 0   @ write it back\n"
-		:
-		: "r" (value)
-		: "memory");
-
-	read_p15_c1 ();
-}
-
-static void cp_delay (void)
-{
-	volatile int i;
-
-	/* copro seems to need some delay between reading and writing */
-	for (i = 0; i < 100; i++);
-}
-
-/* See also ARM920T    Technical reference Manual */
-#define C1_MMU		(1<<0)		/* mmu off/on */
-#define C1_ALIGN	(1<<1)		/* alignment faults off/on */
-#define C1_DC		(1<<2)		/* dcache off/on */
-
-#define C1_BIG_ENDIAN	(1<<7)		/* big endian off/on */
-#define C1_SYS_PROT	(1<<8)		/* system protection */
-#define C1_ROM_PROT	(1<<9)		/* ROM protection */
-#define C1_IC		(1<<12)		/* icache off/on */
-#define C1_HIGH_VECTORS	(1<<13)		/* location of vectors: low/high addresses */
-
-
-int cpu_init (void)
-{
-	/*
-	 * setup up stacks if necessary
-	 */
-#ifdef CONFIG_USE_IRQ
-	IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
-	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
-#endif
-	return 0;
-}
+static void cache_flush(void);
 
 int cleanup_before_linux (void)
 {
@@ -110,76 +48,21 @@ int cleanup_before_linux (void)
 	 * we turn off caches etc ...
 	 */
 
-	unsigned long i;
-
 	disable_interrupts ();
 
 	/* turn off I/D-cache */
-	asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
-	i &= ~(C1_DC | C1_IC);
-	asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
-
+	icache_disable();
+	dcache_disable();
 	/* flush I/D-cache */
-	i = 0;
-	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
-
-	return (0);
-}
-
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-	disable_interrupts ();
-	reset_cpu (0);
-	/*NOTREACHED*/
-	return (0);
-}
-
-void icache_enable (void)
-{
-	ulong reg;
-
-	reg = read_p15_c1 ();		/* get control reg. */
-	cp_delay ();
-	write_p15_c1 (reg | C1_IC);
-}
-
-void icache_disable (void)
-{
-	ulong reg;
+	cache_flush();
 
-	reg = read_p15_c1 ();
-	cp_delay ();
-	write_p15_c1 (reg & ~C1_IC);
-}
-
-int icache_status (void)
-{
-	return (read_p15_c1 () & C1_IC) != 0;
-}
-
-#ifdef USE_920T_MMU
-/* It makes no sense to use the dcache if the MMU is not enabled */
-void dcache_enable (void)
-{
-	ulong reg;
-
-	reg = read_p15_c1 ();
-	cp_delay ();
-	write_p15_c1 (reg | C1_DC);
+	return 0;
 }
 
-void dcache_disable (void)
+/* flush I/D-cache */
+static void cache_flush (void)
 {
-	ulong reg;
-
-	reg = read_p15_c1 ();
-	cp_delay ();
-	reg &= ~C1_DC;
-	write_p15_c1 (reg);
-}
+	unsigned long i = 0;
 
-int dcache_status (void)
-{
-	return (read_p15_c1 () & C1_DC) != 0;
+	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
 }
-#endif