X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=cpu%2F74xx_7xx%2Fcache.S;h=66c72983d42f9cd641db7aee61caa17bc372f7bc;hb=f82642e33899766892499b163e60560fbbf87773;hp=3a745cbe0312fbd385d27411b2a67c9f197df5b6;hpb=cfd60441d8360cb9ffa315ecf3a2aef9bc134905;p=oweals%2Fu-boot.git

diff --git a/cpu/74xx_7xx/cache.S b/cpu/74xx_7xx/cache.S
index 3a745cbe03..66c72983d4 100644
--- a/cpu/74xx_7xx/cache.S
+++ b/cpu/74xx_7xx/cache.S
@@ -52,7 +52,7 @@ _GLOBAL(invalidate_l1_data_cache)
 /*
  * Flush data cache.
  */
-_GLOBAL(flush_data_cache)
+_GLOBAL(flush_dcache)
 	lis	r3,0
 	lis	r5,CACHE_LINE_SIZE
 flush:
@@ -245,6 +245,10 @@ _GLOBAL(icache_enable)
  * Disable L1 Instruction cache
  */
 _GLOBAL(icache_disable)
+	mflr	r4
+	bl	invalidate_l1_instruction_cache		/* uses r3 */
+	sync
+	mtlr	r4
 	mfspr	r3, HID0
 	li	r5, 0
 	ori	r5, r5, HID0_ICE
@@ -288,7 +292,7 @@ _GLOBAL(dcache_enable)
 	mtspr	HID0, r5		/* enable + invalidate */
 	mtspr	HID0, r3		/* enable */
 	sync
-#ifdef CFG_L2
+#ifdef CONFIG_SYS_L2
 	mflr	r5
 	bl	l2cache_enable		/* uses r3 and r4 */
 	sync
@@ -299,12 +303,12 @@ _GLOBAL(dcache_enable)
 
 /*
  * Disable data cache(s) - L1 and optionally L2
- * Calls flush_data_cache and l2cache_disable_no_flush.
+ * Calls flush_dcache and l2cache_disable_no_flush.
  * LR saved in r4
  */
 _GLOBAL(dcache_disable)
 	mflr	r4			/* save link register */
-	bl	flush_data_cache	/* uses r3 and r5 */
+	bl	flush_dcache	/* uses r3 and r5 */
 	sync
 	mfspr	r3, HID0
 	li	r5, HID0_DCFI|HID0_DLOCK
@@ -314,7 +318,7 @@ _GLOBAL(dcache_disable)
 	andc	r3, r3, r5		/* no enable, no invalidate */
 	mtspr	HID0, r3
 	sync
-#ifdef CFG_L2
+#ifdef CONFIG_SYS_L2
 	bl	l2cache_disable_no_flush /* uses r3 */
 #endif
 	mtlr	r4			/* restore link register */
@@ -385,11 +389,11 @@ _GLOBAL(l2cache_enable)
 
 /*
  * Disable L2 cache
- * Calls flush_data_cache. LR is saved in r4
+ * Calls flush_dcache. LR is saved in r4
  */
 _GLOBAL(l2cache_disable)
 	mflr	r4			/* save link register */
-	bl	flush_data_cache	/* uses r3 and r5 */
+	bl	flush_dcache		/* uses r3 and r5 */
 	sync
 	mtlr	r4			/* restore link register */
 l2cache_disable_no_flush:		/* provide way to disable L2 w/o flushing */