X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=configs%2Fxilinx_zynqmp_zc1751_xm018_dc4_defconfig;h=cc2af6dce0ac6a4301f9621f0645b954feb2b081;hb=e37ac717d7964e59cbbb435f2571e8c637896b64;hp=8219de024dbaabb37ce50a875956490e2fda9838;hpb=2600df4f8ef12ece9cec13030005919e0ba2b0d5;p=oweals%2Fu-boot.git

diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
index 8219de024d..cc2af6dce0 100644
--- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
@@ -3,16 +3,16 @@ CONFIG_ARCH_ZYNQMP=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SPL=y
-CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
-CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SPL_TEXT_BASE=0xfffc0000
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
@@ -24,15 +24,16 @@ CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
-# CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
@@ -44,11 +45,10 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
-CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -60,11 +60,11 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_FIXED=y
-CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
+CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
-CONFIG_DEBUG_UART_BASE=0xff000000
-CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y