X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=configs%2Fevb-px5_defconfig;h=f9b17be10e6dfb58c9f29391081b0f8857a8e1c2;hb=7db785c70360dd8ec9a0bcf6b19951e44be65384;hp=9601b12afa1373e212381e0f5aade390fa21185e;hpb=c18b103657d9541305a45a1fb21f979c317fba49;p=oweals%2Fu-boot.git diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 9601b12afa..f9b17be10e 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -1,18 +1,15 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3368=y CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds" -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_TARGET_EVB_PX5=y -CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET=0x3F8000 CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xFF1c0000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -32,13 +29,12 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL_BOOTROM_SUPPORT=y -# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y -CONFIG_TPL_BOOTROM_SUPPORT=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_SPL_OF_CONTROL=y @@ -48,6 +44,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent" CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y CONFIG_REGMAP=y @@ -70,11 +67,6 @@ CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_SYSRESET=y -CONFIG_TIMER=y -CONFIG_SPL_TIMER=y -CONFIG_TPL_TIMER=y -CONFIG_ROCKCHIP_TIMER=y -CONFIG_USE_TINY_PRINTF=y CONFIG_PANIC_HANG=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y