X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=configs%2Fchromebook_speedy_defconfig;h=b4116a34e6c59faf7ee20703ba1da6deb6e6e146;hb=ec1ee5a9272f1393caf5275309cd08cf48e49dd0;hp=c95a9a6d71a97ee5b5e45e28e42f30a271bc5f1b;hpb=59e5d1e2a51592d33cd5758d746006db96d99163;p=oweals%2Fu-boot.git

diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index c95a9a6d71..b4116a34e6 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3288=y
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
@@ -11,8 +12,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
@@ -24,9 +26,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 # CONFIG_SPL_CRC32_SUPPORT is not set
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -46,6 +46,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SPL_OF_PLATDATA=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -66,6 +67,7 @@ CONFIG_PWRSEQ=y
 # CONFIG_SPL_DM_MMC is not set
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
 CONFIG_SF_DEFAULT_BUS=2
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_GIGADEVICE=y