X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=configs%2FMPC837XERDB_defconfig;h=738e75ac36c00c6c735675beec426d8ff33c616b;hb=42e6e8f3485f7d2c7eb94fe0bebdf34a2003bec8;hp=d9e2bf573144480adbc593fa76f6bfe5f69b6ab4;hpb=f4df1f767892b42d01e9213d08a6f16eef646152;p=oweals%2Fu-boot.git diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index d9e2bf5731..738e75ac36 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -1,10 +1,150 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFE000000 +CONFIG_SYS_CLK_FREQ=66666667 CONFIG_MPC83xx=y +CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC837XERDB=y +CONFIG_DDR_MC_CLOCK_MODE_1_1=y +CONFIG_SYSTEM_PLL_FACTOR_5_1=y +CONFIG_CORE_PLL_RATIO_2_1=y +CONFIG_PCI_HOST_MODE_ENABLE=y +CONFIG_PCI_INT_ARBITER1_ENABLE=y +CONFIG_BOOT_MEMORY_SPACE_LOW=y +CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y +CONFIG_TSEC1_MODE_RGMII=y +CONFIG_TSEC2_MODE_RGMII=y +CONFIG_LDP_PIN_MUX_STATE_0=y +CONFIG_BAT0=y +CONFIG_BAT0_NAME="SDRAM_LOWER" +CONFIG_BAT0_BASE=0x00000000 +CONFIG_BAT0_LENGTH_256_MBYTES=y +CONFIG_BAT0_ACCESS_RW=y +CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y +CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y +CONFIG_BAT0_USER_MODE_VALID=y +CONFIG_BAT0_SUPERVISOR_MODE_VALID=y +CONFIG_BAT1=y +CONFIG_BAT1_NAME="SDRAM_UPPER" +CONFIG_BAT1_BASE=0x10000000 +CONFIG_BAT1_LENGTH_256_MBYTES=y +CONFIG_BAT1_ACCESS_RW=y +CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y +CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y +CONFIG_BAT1_USER_MODE_VALID=y +CONFIG_BAT1_SUPERVISOR_MODE_VALID=y +CONFIG_BAT2=y +CONFIG_BAT2_NAME="IMMR" +CONFIG_BAT2_BASE=0xE0000000 +CONFIG_BAT2_LENGTH_8_MBYTES=y +CONFIG_BAT2_ACCESS_RW=y +CONFIG_BAT2_ICACHE_INHIBITED=y +CONFIG_BAT2_ICACHE_GUARDED=y +CONFIG_BAT2_DCACHE_INHIBITED=y +CONFIG_BAT2_DCACHE_GUARDED=y +CONFIG_BAT2_USER_MODE_VALID=y +CONFIG_BAT2_SUPERVISOR_MODE_VALID=y +CONFIG_BAT3=y +CONFIG_BAT3_NAME="L2_SWITCH" +CONFIG_BAT3_BASE=0xF0000000 +CONFIG_BAT3_ACCESS_RW=y +CONFIG_BAT3_ICACHE_INHIBITED=y +CONFIG_BAT3_ICACHE_GUARDED=y +CONFIG_BAT3_DCACHE_INHIBITED=y +CONFIG_BAT3_DCACHE_GUARDED=y +CONFIG_BAT3_USER_MODE_VALID=y +CONFIG_BAT3_SUPERVISOR_MODE_VALID=y +CONFIG_BAT4=y +CONFIG_BAT4_NAME="FLASH" +CONFIG_BAT4_BASE=0xFE000000 +CONFIG_BAT4_LENGTH_32_MBYTES=y +CONFIG_BAT4_ACCESS_RW=y +CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y +CONFIG_BAT4_DCACHE_INHIBITED=y +CONFIG_BAT4_DCACHE_GUARDED=y +CONFIG_BAT4_USER_MODE_VALID=y +CONFIG_BAT4_SUPERVISOR_MODE_VALID=y +CONFIG_BAT5=y +CONFIG_BAT5_NAME="STACH_IN_DCACHE" +CONFIG_BAT5_BASE=0xE6000000 +CONFIG_BAT5_ACCESS_RW=y +CONFIG_BAT5_USER_MODE_VALID=y +CONFIG_BAT5_SUPERVISOR_MODE_VALID=y +CONFIG_BAT6=y +CONFIG_BAT6_NAME="PCI_MEM" +CONFIG_BAT6_BASE=0x80000000 +CONFIG_BAT6_LENGTH_256_MBYTES=y +CONFIG_BAT6_ACCESS_RW=y +CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y +CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y +CONFIG_BAT6_USER_MODE_VALID=y +CONFIG_BAT6_SUPERVISOR_MODE_VALID=y +CONFIG_BAT7=y +CONFIG_BAT7_NAME="PCI_MMIO" +CONFIG_BAT7_BASE=0x90000000 +CONFIG_BAT7_LENGTH_256_MBYTES=y +CONFIG_BAT7_ACCESS_RW=y +CONFIG_BAT7_ICACHE_INHIBITED=y +CONFIG_BAT7_ICACHE_GUARDED=y +CONFIG_BAT7_DCACHE_INHIBITED=y +CONFIG_BAT7_DCACHE_GUARDED=y +CONFIG_BAT7_USER_MODE_VALID=y +CONFIG_BAT7_SUPERVISOR_MODE_VALID=y +CONFIG_LBLAW0=y +CONFIG_LBLAW0_BASE=0xFE000000 +CONFIG_LBLAW0_NAME="FLASH" +CONFIG_LBLAW0_LENGTH_8_MBYTES=y +CONFIG_LBLAW1=y +CONFIG_LBLAW1_BASE=0xE0600000 +CONFIG_LBLAW1_NAME="NAND" +CONFIG_LBLAW1_LENGTH_32_KBYTES=y +CONFIG_LBLAW2=y +CONFIG_LBLAW2_BASE=0xF0000000 +CONFIG_LBLAW2_NAME="VSC7385" +CONFIG_LBLAW2_LENGTH_128_KBYTES=y +CONFIG_ELBC_BR0_OR0=y +CONFIG_BR0_OR0_NAME="FLASH" +CONFIG_BR0_OR0_BASE=0xFE000000 +CONFIG_BR0_PORTSIZE_16BIT=y +CONFIG_OR0_AM_8_MBYTES=y +CONFIG_OR0_SCY_9=y +CONFIG_OR0_XACS_EXTENDED=y +CONFIG_OR0_EHTR_1_CYCLE=y +CONFIG_OR0_EAD_EXTRA=y +CONFIG_ELBC_BR1_OR1=y +CONFIG_BR1_OR1_NAME="NAND" +CONFIG_BR1_OR1_BASE=0xE0600000 +CONFIG_BR1_ERRORCHECKING_BOTH=y +CONFIG_BR1_MACHINE_FCM=y +CONFIG_OR1_SCY_1=y +CONFIG_OR1_CSCT_8_CYCLE=y +CONFIG_OR1_CST_ONE_CLOCK=y +CONFIG_OR1_CHT_TWO_CLOCK=y +CONFIG_OR1_TRLX_RELAXED=y +CONFIG_OR1_EHTR_8_CYCLE=y +CONFIG_ELBC_BR2_OR2=y +CONFIG_BR2_OR2_NAME="VSC7385" +CONFIG_BR2_OR2_BASE=0xF0000000 +CONFIG_OR2_AM_128_KBYTES=y +CONFIG_OR2_SCY_15=y +CONFIG_OR2_CSNT_EARLIER=y +CONFIG_OR2_XACS_EXTENDED=y +CONFIG_OR2_SETA_EXTERNAL=y +CONFIG_OR2_TRLX_RELAXED=y +CONFIG_OR2_EHTR_8_CYCLE=y +CONFIG_OR2_EAD_EXTRA=y +CONFIG_HID0_FINAL_EMCP=y +CONFIG_HID0_FINAL_ICE=y +CONFIG_HID2_HBE=y +CONFIG_ACR_PIPE_DEP_4=y +CONFIG_ACR_RPTCNT_4=y +CONFIG_SPCR_TSECEP_3=y +CONFIG_LCRR_DBYP_PLL_BYPASSED=y +CONFIG_LCRR_CLKDIV_8=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="PCIE" CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -21,7 +161,11 @@ CONFIG_CMD_FAT=y CONFIG_FSL_SATA=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y