X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=common%2Fmiiphyutil.c;h=4b186dd28c0ce02a939d3f908afd7c810f7d5a5c;hb=c9d4f46b5d639a45747d5eaabd31d35856cb918f;hp=281f0b29e3bc1c006e312ee6188e9892b7ef5ab5;hpb=a08ded4e6392b5d0d11a1fce4aaf88e4a7474e8d;p=oweals%2Fu-boot.git

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 281f0b29e3..4b186dd28c 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -29,14 +29,12 @@
 #include <common.h>
 #include <miiphy.h>
 
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
 #include <asm/types.h>
 #include <linux/list.h>
 #include <malloc.h>
 #include <net.h>
 
 /* local debug macro */
-#define MII_DEBUG
 #undef MII_DEBUG
 
 #undef debug
@@ -261,31 +259,25 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
 	unsigned short tmp;
 
 	if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
-#ifdef DEBUG
-		puts ("PHY ID register 2 read failed\n");
-#endif
+		debug ("PHY ID register 2 read failed\n");
 		return (-1);
 	}
 	reg = tmp;
 
-#ifdef DEBUG
-	printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
-#endif
+	debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
+
 	if (reg == 0xFFFF) {
 		/* No physical device present at this address */
 		return (-1);
 	}
 
 	if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
-#ifdef DEBUG
-		puts ("PHY ID register 1 read failed\n");
-#endif
+		debug ("PHY ID register 1 read failed\n");
 		return (-1);
 	}
 	reg |= tmp << 16;
-#ifdef DEBUG
-	printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
-#endif
+	debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
+
 	*oui = (reg >> 10);
 	*model = (unsigned char)((reg >> 4) & 0x0000003F);
 	*rev = (unsigned char)(reg & 0x0000000F);
@@ -301,18 +293,14 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
 int miiphy_reset (char *devname, unsigned char addr)
 {
 	unsigned short reg;
-	int loop_cnt;
+	int timeout = 500;
 
 	if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
-#ifdef DEBUG
-		printf ("PHY status read failed\n");
-#endif
+		debug ("PHY status read failed\n");
 		return (-1);
 	}
-	if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) {
-#ifdef DEBUG
-		puts ("PHY reset failed\n");
-#endif
+	if (miiphy_write (devname, addr, PHY_BMCR, reg | PHY_BMCR_RESET) != 0) {
+		debug ("PHY reset failed\n");
 		return (-1);
 	}
 #ifdef CONFIG_PHY_RESET_DELAY
@@ -323,15 +311,13 @@ int miiphy_reset (char *devname, unsigned char addr)
 	 * auto-clearing).  This should happen within 0.5 seconds per the
 	 * IEEE spec.
 	 */
-	loop_cnt = 0;
 	reg = 0x8000;
-	while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
-		if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
-#     ifdef DEBUG
-			puts ("PHY status read failed\n");
-#     endif
-			return (-1);
+	while (((reg & 0x8000) != 0) && timeout--) {
+		if (miiphy_read(devname, addr, PHY_BMCR, &reg) != 0) {
+			debug("PHY status read failed\n");
+			return -1;
 		}
+		udelay(1000);
 	}
 	if ((reg & 0x8000) == 0) {
 		return (0);
@@ -391,7 +377,7 @@ int miiphy_speed (char *devname, unsigned char addr)
 	/* Get speed from basic control settings. */
 	return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
 
-      miiphy_read_failed:
+miiphy_read_failed:
 	printf (" read failed, assuming 10BASE-T\n");
 	return _10BASET;
 }
@@ -450,7 +436,7 @@ int miiphy_duplex (char *devname, unsigned char addr)
 	/* Get speed from basic control settings. */
 	return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
 
-      miiphy_read_failed:
+miiphy_read_failed:
 	printf (" read failed, assuming half duplex\n");
 	return HALF;
 }
@@ -476,7 +462,7 @@ int miiphy_is_1000base_x (char *devname, unsigned char addr)
 #endif
 }
 
-#ifdef CFG_FAULT_ECHO_LINK_DOWN
+#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 /*****************************************************************************
  *
  * Determine link status
@@ -500,4 +486,3 @@ int miiphy_link (char *devname, unsigned char addr)
 	}
 }
 #endif
-#endif /* CONFIG_MII */