X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=common%2Ffdt_support.c;h=40ff00a154454ca9a57a09311589fd72c45a34e5;hb=922754cc82a82ac90e486b7565a148c9e4b6b584;hp=5a83bca48177d738f6d493283214ac6ca099167e;hpb=17380cb04d510ad1a6983e6d448d2520d444b66a;p=oweals%2Fu-boot.git

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 5a83bca481..40ff00a154 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -495,7 +495,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
 }
 #endif /* CONFIG_HAS_FSL_DR_USB */
 
-#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx)
+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx)
 /*
  * update crypto node properties to a specified revision of the SEC
  * called with sec_rev == 0 if not on an mpc8xxxE processor
@@ -580,7 +580,7 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev)
 		printf("WARNING: could not set crypto property: %s\n",
 		       fdt_strerror(err));
 }
-#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */
+#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */
 
 /* Resize the fdt to its actual size + a bit of padding */
 int fdt_resize(void *blob)
@@ -610,7 +610,7 @@ int fdt_resize(void *blob)
 		fdt_size_dt_strings(blob) + sizeof(struct fdt_reserve_entry);
 
 	/* Make it so the fdt ends on a page boundary */
-	actualsize = ALIGN(actualsize, 0x1000);
+	actualsize = ALIGN(actualsize + ((uint)blob & 0xfff), 0x1000);
 	actualsize = actualsize - ((uint)blob & 0xfff);
 
 	/* Change the fdt header to reflect the correct size */
@@ -625,7 +625,7 @@ int fdt_resize(void *blob)
 }
 
 #ifdef CONFIG_PCI
-#define CONFIG_SYS_PCI_NR_INBOUND_WIN 3
+#define CONFIG_SYS_PCI_NR_INBOUND_WIN 4
 
 #define FDT_PCI_PREFETCH	(0x40000000)
 #define FDT_PCI_MEM32		(0x02000000)
@@ -646,8 +646,8 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {
 	for (r = 0; r < hose->region_count; r++) {
 		u64 bus_start, phys_start, size;
 
-		/* skip if !PCI_REGION_MEMORY */
-		if (!(hose->regions[r].flags & PCI_REGION_MEMORY))
+		/* skip if !PCI_REGION_SYS_MEMORY */
+		if (!(hose->regions[r].flags & PCI_REGION_SYS_MEMORY))
 			continue;
 
 		bus_start = (u64)hose->regions[r].bus_start;
@@ -655,7 +655,7 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {
 		size = (u64)hose->regions[r].size;
 
 		dma_range[0] = 0;
-		if (size > 0x100000000ull)
+		if (size >= 0x100000000ull)
 			dma_range[0] |= FDT_PCI_MEM64;
 		else
 			dma_range[0] |= FDT_PCI_MEM32;
@@ -692,3 +692,47 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
+/*
+ * This function can be used to update the size in the "reg" property
+ * of the NOR FLASH device nodes. This is necessary for boards with
+ * non-fixed NOR FLASH sizes.
+ */
+int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size)
+{
+	char compat[][16] = { "cfi-flash", "jedec-flash" };
+	int off;
+	int len;
+	struct fdt_property *prop;
+	u32 *reg;
+	int i;
+
+	for (i = 0; i < 2; i++) {
+		off = fdt_node_offset_by_compatible(blob, -1, compat[i]);
+		while (off != -FDT_ERR_NOTFOUND) {
+			/*
+			 * Found one compatible node, now check if this one
+			 * has the correct CS
+			 */
+			prop = fdt_get_property_w(blob, off, "reg", &len);
+			if (prop) {
+				reg = (u32 *)&prop->data[0];
+				if (reg[0] == cs) {
+					reg[2] = size;
+					fdt_setprop(blob, off, "reg", reg,
+						    3 * sizeof(u32));
+
+					return 0;
+				}
+			}
+
+			/* Move to next compatible node */
+			off = fdt_node_offset_by_compatible(blob, off,
+							    compat[i]);
+		}
+	}
+
+	return -1;
+}
+#endif