X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Futx8245%2Futx8245.c;h=840268915a14059fecaea2991d6d7030dd1312a1;hb=e7eb046a246e56f964804fea0e103fcbcf2a564e;hp=38c427a4a025994d069bf0d0ee44dc2b26f77124;hpb=8bde7f776c77b343aca29b8c7b58464d915ac245;p=oweals%2Fu-boot.git

diff --git a/board/utx8245/utx8245.c b/board/utx8245/utx8245.c
index 38c427a4a0..840268915a 100644
--- a/board/utx8245/utx8245.c
+++ b/board/utx8245/utx8245.c
@@ -32,6 +32,7 @@
 #include <asm/io.h>
 #include <asm/mmu.h>
 #include <pci.h>
+#include <netdev.h>
 
 #define	SAVE_SZ	32
 
@@ -46,67 +47,32 @@ int checkboard(void)
 }
 
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
-#if 1
-	int				i, cnt;
-	volatile uchar	*base =	CFG_SDRAM_BASE;
-	volatile ulong	*addr;
-	ulong			save[SAVE_SZ];
-	ulong			val, ret  = 0;
-/*
-	write_bat(IBAT1, ((CFG_MAX_RAM_SIZE/2) | BATU_BL_256M | BATU_VS | BATU_VP),
-			( (CFG_MAX_RAM_SIZE/2)| BATL_PP_10 | BATL_MEMCOHERENCE));
-
-	write_bat(DBAT1, ((CFG_MAX_RAM_SIZE/2) | BATU_BL_256M | BATU_VS | BATU_VP),
-			( (CFG_MAX_RAM_SIZE/2)| BATL_PP_10 | BATL_MEMCOHERENCE));
-*/
-	for (i=0; i<SAVE_SZ; i++) {
-		save[i] = 0;		/* clear table */
-	}
-
-	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
-		addr = (volatile ulong *)base + cnt;
-		save[i++] = *addr;
-		*addr = ~cnt;
-	}
-
-	addr = (volatile ulong *)base;
-	save[i] = *addr;
-	*addr = 0;
-
-	if (*addr != 0) {
-		*addr = save[i];
-		goto Done;
-	}
-
-	for (cnt = 1; cnt < CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
-		addr = (volatile ulong *)base + cnt;
-		val = *addr;
-		*addr = save[--i];
-		if (val != ~cnt) {
-			ulong new_bank0_end = cnt * sizeof(long) - 1;
-			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
-			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
-			mear1 =  (mear1  & 0xFFFFFF00) |
-			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
-			emear1 = (emear1 & 0xFFFFFF00) |
-			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
-			mpc824x_mpc107_setreg(MEAR1,  mear1);
-			mpc824x_mpc107_setreg(EMEAR1, emear1);
-
-			ret = cnt * sizeof(long);
-			goto Done;
-		}
-	}
-
-	ret = CFG_MAX_RAM_SIZE;
-Done:
-	return ret;
-#else
-	return (CFG_MAX_RAM_SIZE);
-#endif
-
+	long size;
+	long new_bank0_end;
+	long new_bank1_end;
+	long mear1;
+	long emear1;
+
+	size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+
+	new_bank0_end = size/2 - 1;
+	new_bank1_end = size - 1;
+	mear1 = mpc824x_mpc107_getreg(MEAR1);
+	emear1 = mpc824x_mpc107_getreg(EMEAR1);
+
+	mear1 = (mear1  & 0xFFFF0000) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) |
+		((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8);
+	emear1 = (emear1 & 0xFFFF0000) |
+		((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) |
+		((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8);
+
+	mpc824x_mpc107_setreg(MEAR1, mear1);
+	mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+	return (size);
 }
 
 
@@ -162,3 +128,8 @@ void pci_init_board (void)
 
 	icache_enable();
 }
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}