X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ftqm5200%2Ftqm5200.c;h=e67145eb5be562eeb4790567b5b43cf225e5f63c;hb=5fb5a689d822ca61e814bd523fc930af335242fa;hp=f33d17258ded641ee8c889be33acee964b603338;hpb=409ecdc0bb47dd28b0af6c25ffd658d22cc36b37;p=oweals%2Fu-boot.git diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c index f33d17258d..e67145eb5b 100644 --- a/board/tqm5200/tqm5200.c +++ b/board/tqm5200/tqm5200.c @@ -43,6 +43,10 @@ #include "mt48lc16m16a2-75.h" #endif +#ifdef CONFIG_OF_LIBFDT +#include +#endif /* CONFIG_OF_LIBFDT */ + DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_PS2MULT @@ -100,7 +104,6 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -#if defined(CONFIG_MPC5200) long int initdram (int board_type) { ulong dramsize = 0; @@ -155,10 +158,13 @@ long int initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001c; /* 512MB */ /* find RAM size using SDRAM CS1 only */ - sdram_start(0); - test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000); - sdram_start(1); - test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000); + if (!dramsize) + sdram_start(0); + test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000); + if (!dramsize) { + sdram_start(1); + test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000); + } if (test1 > test2) { sdram_start(0); dramsize2 = test1; @@ -223,57 +229,6 @@ long int initdram (int board_type) #endif /* CONFIG_TQM5200_B */ } -#elif defined(CONFIG_MGT5100) - -long int initdram (int board_type) -{ - ulong dramsize = 0; -#ifndef CFG_RAMBOOT - ulong test1, test2; - - /* setup and enable SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; - - /* address select register */ - *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL; - __asm__ volatile ("sync"); - - /* find RAM size */ - sdram_start(0); - test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000); - if (test1 > test2) { - sdram_start(0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* set SDRAM end address according to size */ - *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - -#else /* CFG_RAMBOOT */ - - /* Retrieve amount of SDRAM available */ - dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); - -#endif /* CFG_RAMBOOT */ - - return dramsize; -} - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif - int checkboard (void) { #if defined(CONFIG_AEVFIFO) @@ -316,10 +271,6 @@ void flash_preinit(void) * Note that CS_BOOT cannot be cleared when * executing in flash. */ -#if defined(CONFIG_MGT5100) - *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ -#endif *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ } @@ -444,6 +395,7 @@ ulong post_word_load (void) #ifdef CONFIG_BOARD_EARLY_INIT_R int board_early_init_r (void) { + extern int usb_cpu_init(void); #ifdef CONFIG_PS2MULT @@ -791,5 +743,6 @@ int board_get_height (void) void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */