X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ftoradex%2Fapalis_imx6%2Fapalis_imx6.c;h=3f85f1ac89b5b18d08371e248df086f31dba64cf;hb=cd304e218012de4ac2e3d55e869b2102af4fdcb2;hp=a716f09ec7ae5084dad1fc095c4cc6a8aff5645b;hpb=16959d75dda0c6ce4cf6d59bcdda270528aefc52;p=oweals%2Fu-boot.git diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index a716f09ec7..3f85f1ac89 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -7,7 +7,9 @@ */ #include +#include #include +#include #include #include @@ -26,8 +28,8 @@ #include #include #include -#include -#include +#include +#include #include #include #include @@ -45,6 +47,10 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SRE_FAST | PAD_CTL_HYS) #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_EMMC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -84,7 +90,7 @@ iomux_v3_cfg_t const uart1_pads_dte[] = { MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_FSL_ESDHC_IMX) && defined(CONFIG_SPL_BUILD) /* Apalis MMC1 */ iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -115,19 +121,19 @@ iomux_v3_cfg_t const usdhc2_pads[] = { /* eMMC */ iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */ int mx6_rgmii_rework(struct phy_device *phydev) { @@ -172,22 +178,6 @@ iomux_v3_cfg_t const enet_pads[] = { # define GPIO_ENET_PHY_RESET IMX_GPIO_NR(1, 25) }; -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); -} - -static int reset_enet_phy(struct mii_dev *bus) -{ - /* Reset KSZ9031 PHY */ - gpio_request(GPIO_ENET_PHY_RESET, "ETH_RESET#"); - gpio_direction_output(GPIO_ENET_PHY_RESET, 0); - mdelay(10); - gpio_set_value(GPIO_ENET_PHY_RESET, 1); - - return 0; -} - /* mux the Apalis GPIO pins, so they can be used from the U-Boot cmdline */ iomux_v3_cfg_t const gpio_pads[] = { /* Apalis GPIO1 - GPIO8 */ @@ -234,8 +224,11 @@ iomux_v3_cfg_t const usb_pads[] = { * UARTs are used in DTE mode, switch the mode on all UARTs before * any pinmuxing connects a (DCE) output to a transceiver output. */ +#define UCR3 0x88 /* FIFO Control Register */ +#define UCR3_RI BIT(8) /* RIDELT DTE mode */ +#define UCR3_DCD BIT(9) /* DCDDELT DTE mode */ #define UFCR 0x90 /* FIFO Control Register */ -#define UFCR_DCEDTE (1<<6) /* DCE=0 */ +#define UFCR_DCEDTE BIT(6) /* DCE=0 */ static void setup_dtemode_uart(void) { @@ -243,6 +236,11 @@ static void setup_dtemode_uart(void) setbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE); setbits_le32((u32 *)(UART4_BASE + UFCR), UFCR_DCEDTE); setbits_le32((u32 *)(UART5_BASE + UFCR), UFCR_DCEDTE); + + clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); } static void setup_dcemode_uart(void) { @@ -273,7 +271,7 @@ int board_ehci_hcd_init(int port) } #endif -#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_FSL_ESDHC_IMX) && defined(CONFIG_SPL_BUILD) /* use the following sequence: eMMC, MMC1, SD1 */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, @@ -343,7 +341,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */ int board_phy_config(struct phy_device *phydev) { @@ -354,41 +352,6 @@ int board_phy_config(struct phy_device *phydev) return 0; } -int board_eth_init(bd_t *bis) -{ - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - int ret; - - setup_iomux_enet(); - -#ifdef CONFIG_FEC_MXC - bus = fec_get_miibus(base, -1); - if (!bus) - return 0; - - bus->reset = reset_enet_phy; - /* scan PHY 4,5,6,7 */ - phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - free(bus); - puts("no PHY found\n"); - return 0; - } - - printf("using PHY at %d\n", phydev->addr); - ret = fec_probe(bis, -1, base, bus, phydev); - if (ret) { - printf("FEC MXC: %s:failed\n", __func__); - free(phydev); - free(bus); - } -#endif /* CONFIG_FEC_MXC */ - - return 0; -} - static iomux_v3_cfg_t const pwr_intb_pads[] = { /* * the bootrom sets the iomux to vselect, potentially connecting @@ -711,6 +674,14 @@ int board_late_init(void) #endif /* CONFIG_TDX_APALIS_IMX6_V1_0 */ #endif /* CONFIG_REVISION_TAG */ +#ifdef CONFIG_CMD_USB_SDP + if (is_boot_from_usb()) { + printf("Serial Downloader recovery mode, using sdp command\n"); + env_set("bootdelay", "0"); + env_set("bootcmd", "sdp 0"); + } +#endif /* CONFIG_CMD_USB_SDP */ + return 0; } #endif /* CONFIG_BOARD_LATE_INIT */ @@ -1096,6 +1067,16 @@ void board_init_f(ulong dummy) board_init_r(NULL, 0); } +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (!strcmp(name, "imx6-apalis")) + return 0; + + return -1; +} +#endif + void reset_cpu(ulong addr) { } @@ -1111,52 +1092,3 @@ U_BOOT_DEVICE(mxc_serial) = { .name = "serial_mxc", .platdata = &mxc_serial_plat, }; - -#if CONFIG_IS_ENABLED(AHCI) -static int sata_imx_probe(struct udevice *dev) -{ - int i, err; - - for (i = 0; i < APALIS_IMX6_SATA_INIT_RETRIES; i++) { - err = setup_sata(); - if (err) { - printf("SATA setup failed: %d\n", err); - return err; - } - - udelay(100); - - err = dwc_ahsata_probe(dev); - if (!err) - break; - - /* There is no device on the SATA port */ - if (sata_dm_port_status(0, 0) == 0) - break; - - /* There's a device, but link not established. Retry */ - device_remove(dev, DM_REMOVE_NORMAL); - } - - return 0; -} - -struct ahci_ops sata_imx_ops = { - .port_status = dwc_ahsata_port_status, - .reset = dwc_ahsata_bus_reset, - .scan = dwc_ahsata_scan, -}; - -static const struct udevice_id sata_imx_ids[] = { - { .compatible = "fsl,imx6q-ahci" }, - { } -}; - -U_BOOT_DRIVER(sata_imx) = { - .name = "dwc_ahci", - .id = UCLASS_AHCI, - .of_match = sata_imx_ids, - .ops = &sata_imx_ops, - .probe = sata_imx_probe, -}; -#endif /* AHCI */