X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fsixnet%2Fsixnet.c;h=06b20835588962c546084c080b41be180fe94699;hb=7bcee5f7eef740c506117e6da1226bc8ec7f466a;hp=4025b4789147c254e718199182e21de235824e9d;hpb=7205e4075d8b50e4dd89fe39ed03860b23cbb704;p=oweals%2Fu-boot.git diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c index 4025b47891..06b2083558 100644 --- a/board/sixnet/sixnet.c +++ b/board/sixnet/sixnet.c @@ -3,23 +3,9 @@ * Dave Ellis, SIXNET, dge@sixnetio.com. * Based on code by: * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * and other contributors to U-Boot. See file CREDITS for list - * of people who contributed to this project. + * and other contributors to U-Boot. * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -33,10 +19,7 @@ # include #endif -#if (CONFIG_COMMANDS & CFG_CMD_NAND) -#include -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; -#endif +DECLARE_GLOBAL_DATA_PTR; #define ORMASK(size) ((-size) & OR_AM_MSK) @@ -49,7 +32,7 @@ void show_boot_progress (int status) { #if defined(CONFIG_STATUS_LED) # if defined(STATUS_LED_BOOT) - if (status == 15) { + if (status == BOOTSTAGE_ID_RUN_OS) { /* ready to transfer to kernel, make sure LED is proper state */ status_led_set(STATUS_LED_BOOT, CONFIG_BOOT_LED_STATE); } @@ -73,9 +56,9 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) +#if defined(CONFIG_CMD_PCMCIA) #error "SXNI855T has no PCMCIA port" -#endif /* CFG_CMD_PCMCIA */ +#endif /* ------------------------------------------------------------------------- */ @@ -131,7 +114,7 @@ const uint duart_table[] = #define FPGA_DONE 0x0080 /* PA8, input, high when FPGA load complete */ #define FPGA_PROGRAM_L 0x0040 /* PA9, output, low to reset, high to start */ #define FPGA_INIT_L 0x0020 /* PA10, input, low indicates not ready */ -#define fpga (*(volatile unsigned char *)(CFG_FPGA_PROG)) /* FPGA port */ +#define fpga (*(volatile unsigned char *)(CONFIG_SYS_FPGA_PROG)) /* FPGA port */ int board_postclk_init (void) { @@ -141,7 +124,7 @@ int board_postclk_init (void) # include "fpgadata.c" }; - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; #define porta (immap->im_ioport.iop_padat) const unsigned char* pdata; @@ -245,10 +228,10 @@ int board_postclk_init (void) /* ------------------------------------------------------------------------- */ /* base address for SRAM, assume 32-bit port, valid */ -#define NVRAM_BR_VALUE (CFG_SRAM_BASE | BR_PS_32 | BR_V) +#define NVRAM_BR_VALUE (CONFIG_SYS_SRAM_BASE | BR_PS_32 | BR_V) /* up to 64MB - will be adjusted for actual size */ -#define NVRAM_OR_PRELIM (ORMASK(CFG_SRAM_SIZE) \ +#define NVRAM_OR_PRELIM (ORMASK(CONFIG_SYS_SRAM_SIZE) \ | OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_5_CLK | OR_EHTR) /* * Miscellaneous platform dependent initializations after running in RAM. @@ -256,14 +239,10 @@ int board_postclk_init (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; - char* s; - char* e; - int reg; bd_t *bd = gd->bd; + uchar enetaddr[6]; memctl->memc_or2 = NVRAM_OR_PRELIM; memctl->memc_br2 = NVRAM_BR_VALUE; @@ -271,7 +250,7 @@ int misc_init_r (void) /* Is there any SRAM? Is it 16 or 32 bits wide? */ /* First look for 32-bit SRAM */ - bd->bi_sramsize = ram_size((ulong*)CFG_SRAM_BASE, CFG_SRAM_SIZE); + bd->bi_sramsize = ram_size((ulong*)CONFIG_SYS_SRAM_BASE, CONFIG_SYS_SRAM_SIZE); if (bd->bi_sramsize == 0) { /* no 32-bit SRAM, but there could be 16-bit SRAM since @@ -279,7 +258,7 @@ int misc_init_r (void) * Try again with a 16-bit bus. */ memctl->memc_br2 |= BR_PS_16; - bd->bi_sramsize = ram_size((ulong*)CFG_SRAM_BASE, CFG_SRAM_SIZE); + bd->bi_sramsize = ram_size((ulong*)CONFIG_SYS_SRAM_BASE, CONFIG_SYS_SRAM_SIZE); } if (bd->bi_sramsize == 0) { @@ -288,7 +267,7 @@ int misc_init_r (void) else { /* adjust or2 for actual size of SRAM */ memctl->memc_or2 |= ORMASK(bd->bi_sramsize); - bd->bi_sramstart = CFG_SRAM_BASE; + bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; printf("SRAM: %lu KB\n", bd->bi_sramsize >> 10); } @@ -315,26 +294,20 @@ int misc_init_r (void) * is present it gets a unique address, otherwise it * shares the FEC address. */ - s = getenv("eth1addr"); - if (s == NULL) - s = getenv("ethaddr"); - for (reg=0; reg<6; ++reg) { - bd->bi_enet1addr[reg] = s ? simple_strtoul(s, &e, 16) : 0; - if (s) - s = (*e) ? e+1 : e; + if (!eth_getenv_enetaddr("eth1addr", enetaddr)) { + eth_getenv_enetaddr("ethaddr", enetaddr); + eth_setenv_enetaddr("eth1addr", enetaddr); } return (0); } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if defined(CONFIG_CMD_NAND) void nand_init(void) { - nand_probe(CFG_DFLASH_BASE); /* see if any NAND flash present */ - if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { - puts("NAND: "); - print_size(nand_dev_desc[0].totlen, "\n"); - } + unsigned long totlen = nand_probe(CONFIG_SYS_DFLASH_BASE); + + printf ("%4lu MB\n", totlen >> 20); } #endif @@ -358,7 +331,7 @@ void nand_init(void) static long ram_size(ulong *base, long maxsize) { volatile long *test_addr; - volatile long *base_addr = base; + volatile ulong *base_addr = base; ulong ofs; /* byte offset from base_addr */ ulong save; /* to make test non-destructive */ ulong save2; /* to make test non-destructive */ @@ -498,9 +471,9 @@ const uint sdram_table[] = /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; uint size_sdram = 0; uint size_sdram9 = 0; @@ -603,70 +576,3 @@ long int initdram(int board_type) return (size_sdram); } - -#ifdef CFG_JFFS_CUSTOM_PART - -static struct part_info part; - -#define jffs2_block(i) \ - ((struct jffs2_unknown_node*)(CFG_JFFS2_BASE + (i) * 65536)) - -struct part_info* jffs2_part_info(int part_num) -{ - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd = gd->bd; - char* s; - int i; - int bootnor = 0; /* assume booting from NAND flash */ - - if (part_num != 0) - return 0; /* only support one partition */ - - if (part.usr_priv == (void*)1) - return ∂ /* already have part info */ - - memset(&part, 0, sizeof(part)); - - if (nand_dev_desc[0].ChipID == NAND_ChipID_UNKNOWN) - bootnor = 1; - else if (bd->bi_flashsize < 0x800000) - bootnor = 0; - else for (i = 0; !bootnor && i < 4; ++i) { - /* boot from NOR if JFFS2 info in any of - * first 4 erase blocks - */ - - if (jffs2_block(i)->magic == JFFS2_MAGIC_BITMASK) - bootnor = 1; - } - - if (bootnor) { - /* no NAND flash or boot in NOR, use NOR flash */ - part.offset = (unsigned char *)CFG_JFFS2_BASE; - part.size = CFG_JFFS2_SIZE; - } - else { - char readcmd[60]; - - /* boot info in NAND flash, get and use copy in RAM */ - - /* override info from environment if present */ - s = getenv("fsaddr"); - part.offset = s ? (void *)simple_strtoul(s, NULL, 16) - : (void *)CFG_JFFS2_RAMBASE; - s = getenv("fssize"); - part.size = s ? simple_strtoul(s, NULL, 16) - : CFG_JFFS2_RAMSIZE; - - /* read from nand flash */ - sprintf(readcmd, "nand read.jffs2 %x 0 %x", - (uint32_t)part.offset, part.size); - run_command(readcmd, 0); - } - - part.erasesize = 0; /* unused */ - part.usr_priv=(void*)1; /* ready */ - - return ∂ -} -#endif /* ifdef CFG_JFFS_CUSTOM_PART */