X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fsiemens%2Fdraco%2Fboard.c;h=5ac73c0ef402a41f4330222f39fe2b43e8abf60c;hb=c05ed00afb95fa5237f16962fccf5810437317bf;hp=988c12ac7c88317bd1328721f12c8c911ab01a91;hpb=e6e3faa5c2da591cd3e0f2047a74cfc832e7b738;p=oweals%2Fu-boot.git

diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index 988c12ac7c..5ac73c0ef4 100644
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Board functions for TI AM335X based draco board
  * (C) Copyright 2013 Siemens Schweiz AG
@@ -9,12 +10,14 @@
  * u-boot:/board/ti/am335x/board.c
  *
  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <command.h>
+#include <env.h>
 #include <errno.h>
+#include <init.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -24,6 +27,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
 #include <asm/io.h>
 #include <asm/emif.h>
 #include <asm/gpio.h>
@@ -31,15 +35,16 @@
 #include <miiphy.h>
 #include <cpsw.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 #include "board.h"
 #include "../common/factoryset.h"
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <nand.h>
 
 #ifdef CONFIG_SPL_BUILD
 static struct draco_baseboard_id __attribute__((section(".data"))) settings;
 
 #if DDR_PLL_FREQ == 303
+#if !defined(CONFIG_TARGET_ETAMIN)
 /* Default@303MHz-i0 */
 const struct ddr3_data ddr3_default = {
 	0x33524444, 0x56312e35, 0x0080, 0x0000, 0x003A, 0x003F, 0x009F,
@@ -48,6 +53,16 @@ const struct ddr3_data ddr3_default = {
 	"default name @303MHz           \0",
 	"default marking                \0",
 };
+#else
+/* etamin board */
+const struct ddr3_data ddr3_default = {
+	0x33524444, 0x56312e36, 0x0080, 0x0000, 0x003A, 0x0010, 0x009F,
+	0x0050, 0x0888A39B, 0x266D7FDA, 0x501F86AF, 0x00100206, 0x61A44BB2,
+	0x0000093B, 0x0000018A,
+	"test-etamin                    \0",
+	"generic-8Gbit                  \0",
+};
+#endif
 #elif DDR_PLL_FREQ == 400
 /* Default@400MHz-i0 */
 const struct ddr3_data ddr3_default = {
@@ -105,6 +120,40 @@ static void print_chip_data(void)
 }
 #endif /* CONFIG_SPL_BUILD */
 
+#define AM335X_NAND_ECC_MASK 0x0f
+#define AM335X_NAND_ECC_TYPE_16 0x02
+
+static int ecc_type;
+
+struct am335x_nand_geometry {
+	u32 magic;
+	u8 nand_geo_addr;
+	u8 nand_geo_page;
+	u8 nand_bus;
+};
+
+static int draco_read_nand_geometry(void)
+{
+	struct am335x_nand_geometry geo;
+
+	/* Read NAND geometry */
+	if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x80, 2,
+		     (uchar *)&geo, sizeof(struct am335x_nand_geometry))) {
+		printf("Could not read the NAND geomtery; something fundamentally wrong on the I2C bus.\n");
+		return -EIO;
+	}
+	if (geo.magic != 0xa657b310) {
+		printf("%s: bad magic: %x\n", __func__, geo.magic);
+		return -EFAULT;
+	}
+	if ((geo.nand_bus & AM335X_NAND_ECC_MASK) == AM335X_NAND_ECC_TYPE_16)
+		ecc_type = 16;
+	else
+		ecc_type = 8;
+
+	return 0;
+}
+
 /*
  * Read header information from EEPROM into global structure.
  */
@@ -147,6 +196,8 @@ static int read_eeprom(void)
 		printf("Warning: No chip data in eeprom\n");
 
 	print_ddr3_timings();
+
+	return draco_read_nand_geometry();
 #endif
 	return 0;
 }
@@ -174,6 +225,7 @@ struct ctrl_ioregs draco_ddr3_ioregs = {
 	draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
 		settings.ddr3.emif_ddr_phy_ctlr_1;
 	draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
+	draco_ddr3_emif_reg_data.sdram_config2 = 0x08000000;
 	draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
 
 	draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
@@ -207,17 +259,28 @@ static void spl_siemens_board_init(void)
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
-	omap_nand_switch_ecc(1, 8);
+	int ret;
+
+	ret = draco_read_nand_geometry();
+	if (ret != 0)
+		return ret;
+
+	nand_curr_device = 0;
+	omap_nand_switch_ecc(1, ecc_type);
+#ifdef CONFIG_TARGET_ETAMIN
+	nand_curr_device = 1;
+	omap_nand_switch_ecc(1, ecc_type);
+#endif
 #ifdef CONFIG_FACTORYSET
 	/* Set ASN in environment*/
 	if (factory_dat.asn[0] != 0) {
-		setenv("dtb_name", (char *)factory_dat.asn);
+		env_set("dtb_name", (char *)factory_dat.asn);
 	} else {
 		/* dtb suffix gets added in load script */
-		setenv("dtb_name", "am335x-draco");
+		env_set("dtb_name", "am335x-draco");
 	}
 #else
-	setenv("dtb_name", "am335x-draco");
+	env_set("dtb_name", "am335x-draco");
 #endif
 
 	return 0;
@@ -269,7 +332,7 @@ int board_eth_init(bd_t *bis)
 	int n = 0;
 	int rv;
 
-	factoryset_setenv();
+	factoryset_env_set();
 
 	/* Set rgmii mode and enable rmii clock to be sourced from chip */
 	writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel);
@@ -282,7 +345,7 @@ int board_eth_init(bd_t *bis)
 	return n;
 }
 
-static int do_switch_reset(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_switch_reset(struct cmd_tbl *cmdtp, int flag, int argc,
 			   char *const argv[])
 {
 	/* Reset SMSC LAN9303 switch for default configuration */
@@ -303,4 +366,23 @@ U_BOOT_CMD(
 #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */
 #endif /* #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) */
 
+#ifdef CONFIG_NAND_CS_INIT
+/* GPMC definitions for second nand cs1 */
+static const u32 gpmc_nand_config[] = {
+	ETAMIN_NAND_GPMC_CONFIG1,
+	ETAMIN_NAND_GPMC_CONFIG2,
+	ETAMIN_NAND_GPMC_CONFIG3,
+	ETAMIN_NAND_GPMC_CONFIG4,
+	ETAMIN_NAND_GPMC_CONFIG5,
+	ETAMIN_NAND_GPMC_CONFIG6,
+	/*CONFIG7- computed as params */
+};
+
+static void board_nand_cs_init(void)
+{
+	enable_gpmc_cs_config(gpmc_nand_config, &gpmc_cfg->cs[1],
+			      0x18000000, GPMC_SIZE_16M);
+}
+#endif
+
 #include "../common/board.c"