X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fronetix%2Fpm9g45%2Fpm9g45.c;h=c5d28c61e2d714dc91375e2ee6fa95ffe704ceae;hb=d9bd42900c6b7de752149d99fe6e6a8114e28259;hp=3b4d9a3459a08a547ff17c7d148a103bf338b9b6;hpb=530135dcacac278798346ad5825c03131ce51772;p=oweals%2Fu-boot.git

diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index 3b4d9a3459..c5d28c61e2 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2010
  * Ilko Iliev <iliev@ronetix.at>
@@ -5,44 +6,25 @@
  * Ronetix GmbH <www.ronetix.at>
  *
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
 #include <common.h>
-#include <asm/sizes.h>
-#include <asm/arch/at91sam9g45.h>
+#include <linux/sizes.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_matrix.h>
-#include <asm/arch/at91_pio.h>
+#include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
 #include <net.h>
 #endif
 #include <netdev.h>
+#include <asm/mach-types.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -54,9 +36,8 @@ DECLARE_GLOBAL_DATA_PTR;
 static void pm9g45_nand_hw_init(void)
 {
 	unsigned long csa;
-	at91_smc_t	*smc	= (at91_smc_t *) AT91_SMC_BASE;
-	at91_matrix_t	*matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
 
 	/* Enable CS3 */
 	csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -80,24 +61,21 @@ static void pm9g45_nand_hw_init(void)
 		AT91_SMC_MODE_TDF_CYCLE(3),
 		&smc->cs[3].mode);
 
-	writel(1 << AT91SAM9G45_ID_PIOC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 #ifdef CONFIG_SYS_NAND_READY_PIN
 	/* Configure RDY/BSY */
-	at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+	gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
 #endif
 
 	/* Enable NandFlash */
-	at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+	gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void pm9g45_macb_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
-	at91_pio_t	*pio	= (at91_pio_t *) AT91_PIO_BASE;
-
 	/*
 	 * PD2 enables the 50MHz oscillator for Ethernet PHY
 	 * 1 - enable
@@ -106,8 +84,7 @@ static void pm9g45_macb_hw_init(void)
 	at91_set_pio_output(AT91_PIO_PORTD, 2, 1);
 	at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */
 
-	/* Enable clock */
-	writel(1 << AT91SAM9G45_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
@@ -130,24 +107,25 @@ static void pm9g45_macb_hw_init(void)
 }
 #endif
 
-int board_init(void)
+int board_early_init_f(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
 
-	/* Enable Ctrlc */
-	console_init_f();
+	at91_seriald_hw_init();
 
-	writel((1 << AT91SAM9G45_ID_PIOA) |
-		(1 << AT91SAM9G45_ID_PIOB) |
-		(1 << AT91SAM9G45_ID_PIOC) |
-		(1 << AT91SAM9G45_ID_PIODE), &pmc->pcer);
+	return 0;
+}
 
+int board_init(void)
+{
 	/* arch number of AT91SAM9M10G45EK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_PM9G45;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	pm9g45_nand_hw_init();
 #endif
@@ -160,8 +138,17 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
+
 	return 0;
 }
 
@@ -173,7 +160,7 @@ void reset_phy(void)
 	 * Initialize ethernet HW addr prior to starting Linux,
 	 * needed for nfsroot
 	 */
-	eth_init(gd->bd);
+	eth_init();
 #endif
 }
 #endif
@@ -182,7 +169,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x01);
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01);
 #endif
 	return rc;
 }