X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fnetstal%2Fhcu5%2Fsdram.c;h=0546cd726d15b834469d37385eb737410fd3ca3f;hb=1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67;hp=f59bd7d1895fa6a2f07d4267cdfa14c31e02500b;hpb=f82642e33899766892499b163e60560fbbf87773;p=oweals%2Fu-boot.git

diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c
index f59bd7d189..0546cd726d 100644
--- a/board/netstal/hcu5/sdram.c
+++ b/board/netstal/hcu5/sdram.c
@@ -89,11 +89,11 @@ static int wait_for_dlllock(void)
 	/* -----------------------------------------------------------+
 	 * Wait for the DCC master delay line to finish calibration
 	 * ----------------------------------------------------------*/
-	mtdcr(memcfga, DDR0_17);
+	mtdcr(SDRAM0_CFGADDR, DDR0_17);
 	val = DDR0_17_DLLLOCKREG_UNLOCKED;
 
 	while (wait != 0xffff) {
-		val = mfdcr(memcfgd);
+		val = mfdcr(SDRAM0_CFGDATA);
 		if ((val & DDR0_17_DLLLOCKREG_MASK) ==
 		    DDR0_17_DLLLOCKREG_LOCKED)
 			/* dlllockreg bit on */
@@ -144,7 +144,7 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes)
 	u32 *magicPtr;
 	u32 magic;
 
-	if ((mfspr(dbcr0) & 0x80000000) == 0) {
+	if ((mfspr(SPRN_DBCR0) & 0x80000000) == 0) {
 		/* only if no external debugger is alive!
 		 * Check whether vxWorks is using EDR logging, if yes zero
 		 * also PostMortem and user reserved memory
@@ -182,7 +182,7 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes)
 	 * If not done, then we could get an interrupt later on when
 	 * exceptions are enabled.
 	 */
-	mtspr(mcsr, mfspr(mcsr));
+	mtspr(SPRN_MCSR, mfspr(SPRN_MCSR));
 
 	/* Set 'int_mask' parameter to functionnal value */
 	mfsdram(DDR0_01, val);