X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fmx1ads%2Fmx1ads.c;h=da9e21dddbb7bc64f38c33dcafa3c2ef256b0b5f;hb=0569f3b9be46cf3fa34232b903236a0893793ee6;hp=f8ce2108c1c5f6de196f1a2d82b3ea30e299a239;hpb=b1c0eaac110bc919e5b4e88821348e714493f266;p=oweals%2Fu-boot.git diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c index f8ce2108c1..da9e21dddb 100644 --- a/board/mx1ads/mx1ads.c +++ b/board/mx1ads/mx1ads.c @@ -27,6 +27,7 @@ #include /*#include */ #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -78,10 +79,8 @@ void SetAsynchMode (void) static u32 mc9328sid; -int board_init (void) +int board_early_init_f(void) { - volatile unsigned int tmp; - mc9328sid = SIDR; GPCR = 0x000003AB; /* I/O pad driving strength */ @@ -107,15 +106,11 @@ int board_init (void) GIUS (0) &= 0xFF3FFFFF; GPR (0) &= 0xFF3FFFFF; - tmp = *(unsigned int *) (0x1500000C); - tmp = *(unsigned int *) (0x1500000C); + readl(0x1500000C); + readl(0x1500000C); SetAsynchMode (); - gd->bd->bi_arch_number = MACH_TYPE_MX1ADS; - - gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ - icache_enable (); dcache_enable (); @@ -133,6 +128,15 @@ int board_init (void) return 0; } +int board_init(void) +{ + gd->bd->bi_arch_number = MACH_TYPE_MX1ADS; + + gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ + + return 0; +} + int board_late_init (void) { @@ -161,12 +165,18 @@ int board_late_init (void) return 0; } -int dram_init (void) +int dram_init(void) +{ + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, + PHYS_SDRAM_1_SIZE); + return 0; +} + +void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; } #ifdef CONFIG_CMD_NET