X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fmpl%2Fpip405%2Fpip405.c;h=677437d09ea99526698509403cddf7b54c439524;hb=e1491288743c3c3547c9b512d03f42eae530a114;hp=87ca6ef4bef24687e74e50ffd997fe4d37f3a173;hpb=7d393aed86972a21d636685d4b280ff5177b481b;p=oweals%2Fu-boot.git diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index 87ca6ef4be..677437d09e 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -28,9 +28,12 @@ #include "pip405.h" #include #include +#include #include "../common/isa.h" #include "../common/common_util.h" +DECLARE_GLOBAL_DATA_PTR; + #undef SDRAM_DEBUG #define FALSE 0 @@ -134,8 +137,6 @@ unsigned short NSto10PS (unsigned char spd_byte) void SDRAM_err (const char *s) { #ifndef SDRAM_DEBUG - DECLARE_GLOBAL_DATA_PTR; - (void) get_clocks (); gd->baudrate = 9600; serial_init (); @@ -176,11 +177,11 @@ void write_4hex (unsigned long val) #endif -int board_pre_init (void) +int board_early_init_f (void) { unsigned char dataout[1]; unsigned char datain[128]; - unsigned long sdram_size; + unsigned long sdram_size = 0; SDRAM_SETUP *t = (SDRAM_SETUP *) sdram_setup_table; unsigned long memclk; unsigned long tmemclk = 0; @@ -191,9 +192,11 @@ int board_pre_init (void) trc_clocks, tctp_clocks; unsigned char cal_index, cal_val, spd_version, spd_chksum; unsigned char buf[8]; -#ifdef SDRAM_DEBUG - DECLARE_GLOBAL_DATA_PTR; -#endif + /* set up the config port */ + mtdcr (ebccfga, pb7ap); + mtdcr (ebccfgd, CONFIG_PORT_AP); + mtdcr (ebccfga, pb7cr); + mtdcr (ebccfgd, CONFIG_PORT_CR); memclk = get_bus_freq (tmemclk); tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */ @@ -206,7 +209,7 @@ int board_pre_init (void) #endif /* Read Serial Presence Detect Information */ - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); dataout[0] = 0; for (i = 0; i < 128; i++) datain[i] = 127; @@ -250,7 +253,7 @@ int board_pre_init (void) (datain[2] != 0x04) || /* if not SDRAM */ (!((datain[6] == 0x40) || (datain[6] == 0x48))) || /* or not (64 Bit or 72 Bit) */ (datain[7] != 0x00) || (datain[8] != 0x01) || /* or not LVTTL signal levels */ - (datain[126] == 0x66)) /* or a 66Mhz modules */ + (datain[126] == 0x66)) /* or a 66MHz modules */ SDRAM_err ("unsupported SDRAM"); #ifdef SDRAM_DEBUG serial_puts ("SDRAM sanity ok\n"); @@ -384,7 +387,7 @@ int board_pre_init (void) /* write SDRAM timing register */ mtdcr (memcfga, mem_sdtr1); mtdcr (memcfgd, tmp); - baseaddr = CFG_SDRAM_BASE; + baseaddr = CONFIG_SYS_SDRAM_BASE; bank_size = (((unsigned long) density) << 22) / 2; /* insert AM value */ tmp = ((unsigned long) t->mode - 1) << 13; @@ -530,7 +533,6 @@ int board_pre_init (void) mtdcr (memcfgd, tmp); - /*-------------------------------------------------------------------------+ | Interrupt controller setup for the PIP405 board. | Note: IRQ 0-15 405GP internally generated; active high; level sensitive @@ -570,15 +572,15 @@ int board_pre_init (void) int checkboard (void) { - unsigned char s[50]; + char s[50]; unsigned char bc; int i; backup_t *b = (backup_t *) s; puts ("Board: "); - i = getenv_r ("serial#", s, 32); - if ((i == 0) || strncmp (s, "PIP405", 6)) { + i = getenv_r ("serial#", (char *)s, 32); + if ((i == 0) || strncmp ((char *)s, "PIP405", 6)) { get_backup_values (b); if (strncmp (b->signature, "MPL\0", 4) != 0) { puts ("### No HW ID - assuming PIP405"); @@ -607,10 +609,8 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -long int initdram (int board_type) +phys_size_t initdram (int board_type) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long bank_reg[4], tmp, bank_size; int i, ds; unsigned long TotalSize; @@ -658,8 +658,19 @@ static int test_dram (unsigned long ramsize) } +extern flash_info_t flash_info[]; /* info for FLASH chips */ + int misc_init_r (void) { + /* adjust flash start and size as well as the offset */ + gd->bd->bi_flashstart=0-flash_info[0].size; + gd->bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN; + gd->bd->bi_flashoffset=0; + + /* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ + if (mfdcr(strap) & PSR_ROM_LOC) + mtspr(SPRN_CCR0, (mfspr(SPRN_CCR0) & ~0x80)); + return (0); } @@ -673,7 +684,6 @@ int overwrite_console (void) } - extern int isa_init (void); @@ -696,7 +706,7 @@ int last_stage_init (void) { print_pip405_rev (); isa_init (); - show_stdio_dev (); + stdio_print_current_devices (); check_env(); return 0; } @@ -943,5 +953,3 @@ void ide_set_reset (int idereset) } out8 (PLD_SCSI_RST_REG, resreg); } - -