X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fincaip%2Fincaip.c;h=ac7ad8f292e438b00aa36607c8054d40a64cf373;hb=6aca145e067efe75398e9fac97822bd3700de0b2;hp=eb6eaea27857c908f9bc173d8886968a2c777543;hpb=c83bf6a2d00ef846c1fb2b0c60540f03ef203125;p=oweals%2Fu-boot.git diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c index eb6eaea278..ac7ad8f292 100644 --- a/board/incaip/incaip.c +++ b/board/incaip/incaip.c @@ -25,10 +25,16 @@ #include #include #include - +#include +#include extern uint incaip_get_cpuclk(void); +void _machine_restart(void) +{ + *INCA_IP_WDT_RST_REQ = 0x3f; +} + static ulong max_sdram_size(void) { /* The only supported SDRAM data width is 16bit. @@ -47,7 +53,7 @@ static ulong max_sdram_size(void) return size; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { int rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0; ulong size, max_size = 0; @@ -57,7 +63,7 @@ long int initdram(int board_type) /* Can't probe for RAM size unless we are running from Flash. */ - if (PHYSADDR(our_address) < PHYSADDR(PHYS_FLASH_1)) + if (CPHYSADDR(our_address) < CPHYSADDR(PHYS_FLASH_1)) { return max_sdram_size(); } @@ -68,7 +74,7 @@ long int initdram(int board_type) { *INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) | (rows << 4) | cols; - size = get_ram_size((ulong *)CFG_SDRAM_BASE, + size = get_ram_size((long *)CFG_SDRAM_BASE, max_sdram_size()); if (size > max_size) @@ -85,7 +91,6 @@ long int initdram(int board_type) int checkboard (void) { - unsigned long chipid = *INCA_IP_WDT_CHIPID; int part_num; @@ -107,5 +112,7 @@ int checkboard (void) printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000); + set_io_port_base(0); + return 0; }