X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ffreescale%2Ft104xrdb%2Ft104xrdb.c;h=ddb669fb06c9b8b5e982863477395f9eb971571a;hb=e82abaeb7f2a0833fccf90460c48b9f2100258f8;hp=6e29d6410775511b263ccb09da6bf5fd6ed17abe;hpb=faca8ff55f4a2cf45fb906cc37f44601149fc00e;p=oweals%2Fu-boot.git

diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index 6e29d64107..ddb669fb06 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -17,16 +17,30 @@
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <asm/mpc85xx_gpio.h>
 
 #include "t104xrdb.h"
+#include "cpld.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int checkboard(void)
 {
 	struct cpu_type *cpu = gd->arch.cpu;
+	u8 sw;
 
 	printf("Board: %sRDB\n", cpu->name);
+	printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
+	       CPLD_READ(hw_ver), CPLD_READ(sw_ver));
+
+	sw = CPLD_READ(flash_ctl_status);
+	sw = ((sw & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
+
+	if (sw <= 7)
+		printf("vBank: %d\n", sw);
+	else
+		printf("Unsupported Bank=%x\n", sw);
+
 	return 0;
 }
 
@@ -34,7 +48,7 @@ int board_early_init_r(void)
 {
 #ifdef CONFIG_SYS_FLASH_BASE
 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
-	const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+	int flash_esel = find_tlb_idx((void *)flashbase, 1);
 
 	/*
 	 * Remap Boot flash region to caching-inhibited
@@ -45,8 +59,14 @@ int board_early_init_r(void)
 	flush_dcache();
 	invalidate_icache();
 
-	/* invalidate existing TLB entry for flash */
-	disable_tlb(flash_esel);
+	if (flash_esel == -1) {
+		/* very unlikely unless something is messed up */
+		puts("Error: Could not find TLB for FLASH BASE\n");
+		flash_esel = 2;	/* give our best effort to continue */
+	} else {
+		/* invalidate existing TLB entry for flash */
+		disable_tlb(flash_esel);
+	}
 
 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
@@ -91,3 +111,14 @@ void ft_board_setup(void *blob, bd_t *bd)
 	fdt_fixup_fman_ethernet(blob);
 #endif
 }
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+	/* does not provide HW signals for power management */
+	CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40));
+	/* Disable MCKE isolation */
+	gpio_set_value(2, 0);
+	udelay(1);
+}
+#endif