X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ffreescale%2Fmpc8610hpcd%2Fmpc8610hpcd.c;h=ce563dc67a996d018c3f1c435115d28bacc59bbc;hb=1a5017601f6d17caedaa2bf069485d3e4155f1c0;hp=63790ca9b646fdd2eb85ddf3e56669150305e92b;hpb=3dd2db53ceb0dff80f25c2a07f83f29b907b403e;p=oweals%2Fu-boot.git diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 63790ca9b6..ce563dc67a 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -19,21 +19,18 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#define DEBUG + #include #include #include #include #include #include -#include +#include #include - - -#if defined(CONFIG_OF_FLAT_TREE) -#include -extern void ft_cpu_setup(void *blob, bd_t *bd); -#endif +#include +#include +#include #include "../common/pixis.h" @@ -41,12 +38,10 @@ extern void ft_cpu_setup(void *blob, bd_t *bd); extern void ddr_enable_ecc(unsigned int dram_size); #endif -#if defined(CONFIG_SPD_EEPROM) -#include "spd_sdram.h" -#endif - void sdram_init(void); long int fixed_sdram(void); +void mpc8610hpcd_diu_init(void); + /* called before any console output */ int board_early_init_f(void) @@ -54,7 +49,47 @@ int board_early_init_f(void) volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; - gur->gpiocr |= 0x888a5500; /* DIU16, IR1, UART0, UART2 */ + gur->gpiocr |= 0x88aa5500; /* DIU16, IR1, UART0, UART2 */ + + return 0; +} + +int misc_init_r(void) +{ + u8 tmp_val, version; + + /*Do not use 8259PIC*/ + tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); + out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80); + + /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ + version = in8(PIXIS_BASE + PIXIS_PVER); + if(version >= 0x07) { + tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); + out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf); + } + + /* Using this for DIU init before the driver in linux takes over + * Enable the TFP410 Encoder (I2C address 0x38) + */ + + tmp_val = 0xBF; + i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); + /* Verify if enabled */ + tmp_val = 0; + i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); + debug("DVI Encoder Read: 0x%02lx\n",tmp_val); + + tmp_val = 0x10; + i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); + /* Verify if enabled */ + tmp_val = 0; + i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); + debug("DVI Encoder Read: 0x%02lx\n",tmp_val); + +#ifdef CONFIG_FSL_DIU_FB + mpc8610hpcd_diu_init(); +#endif return 0; } @@ -62,7 +97,6 @@ int board_early_init_f(void) int checkboard(void) { volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_lbc_t *memctl = &immap->im_lbc; volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; puts("Board: MPC8610HPCD\n"); @@ -107,42 +141,6 @@ initdram(int board_type) } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - puts("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - puts("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - puts("SDRAM test passed.\n"); - return 0; -} -#endif - - #if !defined(CONFIG_SPD_EEPROM) /* * Fixed sdram init -- doesn't use serial presence detect. @@ -158,7 +156,7 @@ long int fixed_sdram(void) ddr->cs0_bnds = 0x0000001f; ddr->cs0_config = 0x80010202; - ddr->ext_refrec = 0x00000000; + ddr->timing_cfg_3 = 0x00000000; ddr->timing_cfg_0 = 0x00260802; ddr->timing_cfg_1 = 0x3935d322; ddr->timing_cfg_2 = 0x14904cc8; @@ -242,13 +240,14 @@ void pci_init_board(void) volatile immap_t *immap = (immap_t *) CFG_CCSRBAR; volatile ccsr_gur_t *gur = &immap->im_gur; uint devdisr = gur->devdisr; - uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; - uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; + uint io_sel = (gur->pordevsr & MPC8610_PORDEVSR_IO_SEL) + >> MPC8610_PORDEVSR_IO_SEL_SHIFT; + uint host_agent = (gur->porbmsr & MPC8610_PORBMSR_HA) + >> MPC8610_PORBMSR_HA_SHIFT; printf( " pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", devdisr, io_sel, host_agent); - #ifdef CONFIG_PCIE1 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR; @@ -417,46 +416,57 @@ void pci_init_board(void) #endif /* CONFIG_PCI1 */ } -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { - u32 *p; - int len; + int node, tmp[2]; + const char *path; - ft_cpu_setup(blob, bd); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "timebase-frequency", bd->bi_busfreq / 4, 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "bus-frequency", bd->bi_busfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "clock-frequency", bd->bi_intfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "soc", 4, + "bus-frequency", bd->bi_busfreq, 1); + + do_fixup_by_compat_u32(blob, "ns16550", + "clock-frequency", bd->bi_busfreq, 1); + + fdt_fixup_memory(blob, bd->bi_memstart, bd->bi_memsize); - p = ft_get_prop(blob, "/memory/reg", &len); - if (p != NULL) { - *p++ = cpu_to_be32(bd->bi_memstart); - *p = cpu_to_be32(bd->bi_memsize); - } + + node = fdt_path_offset(blob, "/aliases"); + tmp[0] = 0; + if (node >= 0) { #ifdef CONFIG_PCI1 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8000/bus-range", &len); - if (p != NULL) { - p[0] = 0; - p[1] = pci1_hose.last_busno - pci1_hose.first_busno; - debug("pci@8000 first_busno=%d last_busno=%d\n",p[0],p[1]); - } + path = fdt_getprop(blob, node, "pci0", NULL); + if (path) { + tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; + do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); + } + #endif #ifdef CONFIG_PCIE1 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len); - if (p != NULL) { - p[0] = 0; - p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; - debug("pcie@9000 first_busno=%d last_busno=%d\n",p[0],p[1]); + path = fdt_getprop(blob, node, "pci1", NULL); + if (path) { + tmp[1] = pcie1_hose.last_busno + - pcie1_hose.first_busno; + do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); } #endif #ifdef CONFIG_PCIE2 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len); - if (p != NULL) { - p[0] = 0; - p[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; - debug("pcie@9000 first_busno=%d last_busno=%d\n",p[0],p[1]); - } + path = fdt_getprop(blob, node, "pci2", NULL); + if (path) { + tmp[1] = pcie2_hose.last_busno + - pcie2_hose.first_busno; + do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); + } #endif - + } } #endif @@ -468,7 +478,7 @@ ft_board_setup(void *blob, bd_t *bd) unsigned long get_board_sys_clk(ulong dummy) { - u8 i, go_bit, rd_clks; + u8 i; ulong val = 0; ulong a;