X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ffreescale%2Fmpc5121ads%2Fmpc5121ads.c;h=940978e649e6b6dbe1d44eee5f40c9b70f6d4bc0;hb=6612ab33956ae09c5ba2fde9c1540b519625ba37;hp=2e13ea802378e69aecf07f4472440838027159be;hpb=bb3bcfa2426cc6a0aecec7270e3ee67ca843a125;p=oweals%2Fu-boot.git

diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c
index 2e13ea8023..940978e649 100644
--- a/board/freescale/mpc5121ads/mpc5121ads.c
+++ b/board/freescale/mpc5121ads/mpc5121ads.c
@@ -1,24 +1,7 @@
 /*
  * (C) Copyright 2007-2009 DENX Software Engineering
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -38,23 +21,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Clocks in use */
-#define SCCR1_CLOCKS_EN	(CLOCK_SCCR1_CFG_EN |				\
-			 CLOCK_SCCR1_DDR_EN |				\
-			 CLOCK_SCCR1_FEC_EN |				\
-			 CLOCK_SCCR1_LPC_EN |				\
-			 CLOCK_SCCR1_NFC_EN |				\
-			 CLOCK_SCCR1_PATA_EN |				\
-			 CLOCK_SCCR1_PCI_EN |				\
-			 CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |	\
-			 CLOCK_SCCR1_PSCFIFO_EN |			\
-			 CLOCK_SCCR1_TPR_EN)
-
-#define SCCR2_CLOCKS_EN	(CLOCK_SCCR2_DIU_EN |		\
-			 CLOCK_SCCR2_I2C_EN |		\
-			 CLOCK_SCCR2_MEM_EN |		\
-			 CLOCK_SCCR2_SPDIF_EN)
-
 void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip);
 
 /* Active chip number set in board_nand_select_device() (mpc5121_nfc.c) */
@@ -81,20 +47,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
 
 int board_early_init_f(void)
 {
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 spridr;
-
-	/*
-	 * Initialize Local Window for the CPLD registers access (CS2 selects
-	 * the CPLD chip)
-	 */
-	out_be32(&im->sysconf.lpcs2aw,
-		CSAW_START(CONFIG_SYS_CPLD_BASE) |
-		CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE)
-	);
-	out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
-	sync_law(&im->sysconf.lpcs2aw);
-
 	/*
 	 * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
 	 *
@@ -102,7 +54,7 @@ int board_early_init_f(void)
 	 * write commands in order to establish the device ID.
 	 */
 
-#ifdef CONFIG_ADS5121_REV2
+#ifdef CONFIG_MPC5121ADS_REV2
 	out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0xC1);
 #else
 	if (in_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) {
@@ -112,25 +64,6 @@ int board_early_init_f(void)
 		out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32);
 	}
 #endif
-	/*
-	 * Configure Flash Speed
-	 */
-	out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
-	spridr = in_be32(&im->sysconf.spridr);
-
-	if (SVR_MJREV (spridr) >= 2)
-		out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
-
-	/*
-	 * Enable clocks
-	 */
-	out_be32 (&im->clk.sccr[0], SCCR1_CLOCKS_EN);
-	out_be32 (&im->clk.sccr[1], SCCR2_CLOCKS_EN);
-#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
-	setbits_be32 (&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
-#endif
-
 	return 0;
 }
 
@@ -251,20 +184,15 @@ int misc_init_r(void)
 	/* Verify if enabled */
 	tmp_val = 0;
 	i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
-	debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+	debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
 	tmp_val = 0x10;
 	i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
 	/* Verify if enabled */
 	tmp_val = 0;
 	i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
-	debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+	debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
-#ifdef CONFIG_FSL_DIU_FB
-# if	!(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
-	mpc5121_diu_init();
-# endif
-#endif
 	return 0;
 }
 
@@ -334,7 +262,7 @@ int checkboard (void)
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
 	u32 spridr = in_be32(&im->sysconf.spridr);
 
-	printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
+	printf ("Board: MPC5121ADS rev. 0x%04x (CPLD rev. 0x%02x)\n",
 		brd_rev, cpld_rev);
 
 	/* initialize function mux & slew rate IO inter alia on IO Pins  */