X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ffreescale%2Fcorenet_ds%2Fddr.c;h=38f13ce4b2ec39ee30e71015bc044662f6b7e8aa;hb=8a81bfd271f9122933c865c790780024f5e2d576;hp=e7e893a1aec412e6217c4cfd0f9cd6c22ca70412;hpb=f44483b57c49282299da0e5c10073b909cdad979;p=oweals%2Fu-boot.git diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c index e7e893a1ae..38f13ce4b2 100644 --- a/board/freescale/corenet_ds/ddr.c +++ b/board/freescale/corenet_ds/ddr.c @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright 2009-2011 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. */ #include @@ -21,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR; * Fixed sdram init -- doesn't use serial presence detect. */ extern fixed_ddr_parm_t fixed_ddr_parm_0[]; -#if (CONFIG_NUM_DDR_CONTROLLERS == 2) +#if (CONFIG_SYS_NUM_DDR_CTLRS == 2) extern fixed_ddr_parm_t fixed_ddr_parm_1[]; #endif @@ -58,7 +55,7 @@ phys_size_t fixed_sdram(void) ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN; fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0); -#if (CONFIG_NUM_DDR_CONTROLLERS == 2) +#if (CONFIG_SYS_NUM_DDR_CTLRS == 2) memcpy(&ddr_cfg_regs, fixed_ddr_parm_1[i].ddr_settings, sizeof(ddr_cfg_regs)); @@ -78,7 +75,7 @@ phys_size_t fixed_sdram(void) return 0; } } else { -#if (CONFIG_NUM_DDR_CONTROLLERS == 2) +#if (CONFIG_SYS_NUM_DDR_CTLRS == 2) /* We require both controllers have identical DIMMs */ lawbar1_target_id = LAW_TRGT_IF_DDR_1; if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, @@ -262,7 +259,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -280,5 +277,7 @@ phys_size_t initdram(int board_type) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; }