X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ffreescale%2Fcommon%2Fngpixis.c;h=d7254010bff7513a409685f0a5601cf5c780e13c;hb=7e20c1f4b1daa9cd6cc5e75f7ab8627ddd97c7b2;hp=4e01e5a0a2e6660eb202b5d9514c8ac4876ad788;hpb=aa8d3fb8f4d383e7371f8f678ca3db1ca7d0ae32;p=oweals%2Fu-boot.git

diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index 4e01e5a0a2..d7254010bf 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -1,12 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /**
  * Copyright 2010-2011 Freescale Semiconductor
  * Author: Timur Tabi <timur@freescale.com>
  *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
  * This file provides support for the ngPIXIS, a board-specific FPGA used on
  * some Freescale reference boards.
  *
@@ -119,11 +115,70 @@ void __set_altbank(void)
 }
 void set_altbank(void) __attribute__((weak, alias("__set_altbank")));
 
+#ifdef DEBUG
+static void pixis_dump_regs(void)
+{
+	unsigned int i;
+
+	printf("id=%02x\n", PIXIS_READ(id));
+	printf("arch=%02x\n", PIXIS_READ(arch));
+	printf("scver=%02x\n", PIXIS_READ(scver));
+	printf("csr=%02x\n", PIXIS_READ(csr));
+	printf("rst=%02x\n", PIXIS_READ(rst));
+	printf("aux=%02x\n", PIXIS_READ(aux));
+	printf("spd=%02x\n", PIXIS_READ(spd));
+	printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0));
+	printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1));
+	printf("addr=%02x\n", PIXIS_READ(addr));
+	printf("data=%02x\n", PIXIS_READ(data));
+	printf("led=%02x\n", PIXIS_READ(led));
+	printf("vctl=%02x\n", PIXIS_READ(vctl));
+	printf("vstat=%02x\n", PIXIS_READ(vstat));
+	printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0));
+	printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr));
+	printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg));
+	printf("gmdbg=%02x\n", PIXIS_READ(gmdbg));
+	printf("sclk=%02x%02x%02x\n",
+	       PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2]));
+	printf("dclk=%02x%02x%02x\n",
+	       PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2]));
+	printf("watch=%02x\n", PIXIS_READ(watch));
+
+	for (i = 0; i < 8; i++) {
+		printf("SW%u=%02x/%02x ", i + 1,
+			PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en));
+	}
+	putc('\n');
+}
+#endif
+
+void pixis_sysclk_set(unsigned long sysclk)
+{
+	unsigned long freq_word;
+	u8 sclk0, sclk1, sclk2;
+
+	freq_word = ics307_sysclk_calculator(sysclk);
+	sclk2 = freq_word & 0xff;
+	sclk1 = (freq_word >> 8) & 0xff;
+	sclk0 = (freq_word >> 16) & 0xff;
+
+	/* set SYSCLK enable bit */
+	PIXIS_WRITE(vcfgen0, 0x01);
+
+	/* SYSCLK to required frequency */
+	PIXIS_WRITE(sclk[0], sclk0);
+	PIXIS_WRITE(sclk[1], sclk1);
+	PIXIS_WRITE(sclk[2], sclk2);
+}
 
 int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	unsigned int i;
+	unsigned long sysclk;
 	char *p_altbank = NULL;
+#ifdef DEBUG
+	char *p_dump = NULL;
+#endif
 	char *unknown_param = NULL;
 
 	/* No args is a simple reset request.
@@ -137,6 +192,19 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			continue;
 		}
 
+#ifdef DEBUG
+		if (strcmp(argv[i], "dump") == 0) {
+			p_dump = argv[i];
+			continue;
+		}
+#endif
+		if (strcmp(argv[i], "sysclk") == 0) {
+			sysclk = simple_strtoul(argv[i + 1], NULL, 0);
+			i += 1;
+			pixis_sysclk_set(sysclk);
+			continue;
+		}
+
 		unknown_param = argv[i];
 	}
 
@@ -145,6 +213,15 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		return 1;
 	}
 
+#ifdef DEBUG
+	if (p_dump) {
+		pixis_dump_regs();
+
+		/* 'dump' ignores other commands */
+		return 0;
+	}
+#endif
+
 	if (p_altbank)
 		set_altbank();
 	else
@@ -156,9 +233,17 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-U_BOOT_CMD(
-	pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
-	"Reset the board using the FPGA sequencer",
+#ifdef CONFIG_SYS_LONGHELP
+static char pixis_help_text[] =
 	"- hard reset to default bank\n"
 	"pixis_reset altbank - reset to alternate bank\n"
+#ifdef DEBUG
+	"pixis_reset dump - display the PIXIS registers\n"
+#endif
+	"pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n";
+#endif
+
+U_BOOT_CMD(
+	pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
+	"Reset the board using the FPGA sequencer", pixis_help_text
 	);