X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Ffreescale%2Fb4860qds%2Feth_b4860qds.c;h=dc4ef80fc883f4ef85c57d2ca16499636d49b0ae;hb=19d829fa60fc4e6df514a046142faaaf9fc8185d;hp=3bcda6d13afccf3849c73d5c466eb898d1c1cbe7;hpb=e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c;p=oweals%2Fu-boot.git

diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c
index 3bcda6d13a..dc4ef80fc8 100644
--- a/board/freescale/b4860qds/eth_b4860qds.c
+++ b/board/freescale/b4860qds/eth_b4860qds.c
@@ -2,23 +2,7 @@
  * Copyright 2012 Freescale Semiconductor, Inc.
  * Author: Sandeep Kumar Singh <sandeep@freescale.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /* This file is based on board/freescale/corenet_ds/eth_superhydra.c */
@@ -217,8 +201,6 @@ int board_eth_init(bd_t *bis)
 		debug("Setting phy addresses for FM1_DTSEC5: %x and"
 			"FM1_DTSEC6: %x\n", CONFIG_SYS_FM1_DTSEC5_PHY_ADDR,
 			CONFIG_SYS_FM1_DTSEC6_PHY_ADDR);
-		/* Fixing Serdes clock by programming FPGA register */
-		QIXIS_WRITE(brdcfg[4], QIXIS_SRDS1CLK_125);
 		fm_info_set_phy_address(FM1_DTSEC5,
 				CONFIG_SYS_FM1_DTSEC5_PHY_ADDR);
 		fm_info_set_phy_address(FM1_DTSEC6,