X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fesd%2Fpmc440%2Fcmd_pmc440.c;h=200d7ee30d3323aa9eb782a2b17a0b0dcdd90080;hb=083d506937002f2795c80fe0c3ae194ad2c3d085;hp=90d93095558f7b201f2557cd2fe4d3840b6c465b;hpb=62479b181460f5bf99517b68059d5ba87908edd3;p=oweals%2Fu-boot.git diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index 90d9309555..200d7ee30d 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -26,6 +26,9 @@ #include #include #include +#if defined(CONFIG_LOGBUFFER) +#include +#endif #include "pmc440.h" @@ -64,7 +67,7 @@ int fpga_interrupt(u32 arg) return rc; } -int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA; @@ -95,9 +98,9 @@ int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( waithci, 1, 1, do_waithci, - "waithci - Wait for host control interrupt\n", - NULL - ); + "Wait for host control interrupt", + "" +); void dump_fifo(pmc440_fpga_t *fpga, int f, int *n) { @@ -115,7 +118,7 @@ void dump_fifo(pmc440_fpga_t *fpga, int f, int *n) } } -int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA; int i; @@ -239,7 +242,7 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) "address %08x\n", n, data, f); for (i=0; ihelp); @@ -255,7 +258,7 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( fifo, 5, 1, do_fifo, - "fifo - Fifo module operations\n", + "Fifo module operations", "wait\nfifo read\n" "fifo write fifo(0..3) data [cnt=1]\n" "fifo write address(>=4) data [cnt=1]\n" @@ -263,10 +266,10 @@ U_BOOT_CMD( " - with 'wait' argument: interrupt driven read from all fifos\n" " - with 'read' argument: read current contents from all fifos\n" " - with 'write' argument: write 'data' 'cnt' times to " - "'fifo' or 'address'\n" - ); + "'fifo' or 'address'" +); -int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong sdsdp[5]; ulong delay; @@ -293,20 +296,9 @@ int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] sdsdp[2]=0x40082350; sdsdp[3]=0x0d050000; } else if (!strcmp(argv[1], "667")) { - /* PLB=133MHz, PLB/PCI=4 */ + /* PLB=133MHz, PLB/PCI=3 */ printf("Bootstrapping for 667MHz\n"); sdsdp[0]=0x8778a256; - sdsdp[1]=0x0947a030; - sdsdp[2]=0x40082350; - sdsdp[3]=0x0d050000; - } else if (!strcmp(argv[1], "test")) { - /* - * TODO: this will replace the 667 MHz config above. - * But it needs some more testing on a real 667 MHz CPU. - */ - printf("Bootstrapping for test" - " (667MHz PLB=133PLB PLB/PCI=3)\n"); - sdsdp[0]=0x8778a256; sdsdp[1]=0x095fa030; sdsdp[2]=0x40082350; sdsdp[3]=0x0d050000; @@ -334,7 +326,7 @@ int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] } printf("Writing boot EEPROM ...\n"); - if (bootstrap_eeprom_write(CFG_I2C_BOOT_EEPROM_ADDR, + if (bootstrap_eeprom_write(CONFIG_SYS_I2C_BOOT_EEPROM_ADDR, 0, (uchar*)sdsdp, count) != 0) printf("bootstrap_eeprom_write failed\n"); else @@ -344,24 +336,21 @@ int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] } U_BOOT_CMD( sbe, 4, 0, do_setup_bootstrap_eeprom, - "sbe - setup bootstrap eeprom\n", + "setup bootstrap eeprom", " [ []]" - ); +); #if defined(CONFIG_PRAM) #include extern env_t *env_ptr; -int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - u32 memsize; - u32 pram, env_base; + u32 pram, nextbase, base; char *v; u32 param; ulong *lptr; - memsize = gd->bd->bi_memsize; - v = getenv("pram"); if (v) pram = simple_strtoul(v, NULL, 10); @@ -370,59 +359,63 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 1; } - param = memsize - (pram << 10); + base = gd->bd->bi_memsize; +#if defined(CONFIG_LOGBUFFER) + base -= LOGBUFF_LEN + LOGBUFF_OVERHEAD; +#endif + /* + * gd->bd->bi_memsize == physical ram size - CONFIG_SYS_MEM_TOP_HIDE + */ + param = base - (pram << 10); printf("PARAM: @%08x\n", param); + debug("memsize=0x%08x, base=0x%08x\n", gd->bd->bi_memsize, base); + /* clear entire PA ram */ memset((void*)param, 0, (pram << 10)); - env_base = memsize - 4096 - ((CFG_ENV_SIZE + 4096) & ~(4096-1)); - memcpy((void*)env_base, env_ptr, CFG_ENV_SIZE); - lptr = (ulong*)memsize; - *(--lptr) = CFG_ENV_SIZE; - *(--lptr) = memsize - env_base; - *(--lptr) = crc32(0, (void*)(memsize - 0x08), 0x08); - *(--lptr) = 0; + /* reserve 4k for pointer field */ + nextbase = base - 4096; + lptr = (ulong*)(base); - /* make sure data can be accessed through PCI */ - flush_dcache_range(param, param + (pram << 10) - 1); + /* + * *(--lptr) = item_size; + * *(--lptr) = base - item_base = distance from field top; + */ + + /* env is first (4k aligned) */ + nextbase -= ((CONFIG_ENV_SIZE + 4096 - 1) & ~(4096 - 1)); + memcpy((void*)nextbase, env_ptr, CONFIG_ENV_SIZE); + *(--lptr) = CONFIG_ENV_SIZE; /* size */ + *(--lptr) = base - nextbase; /* offset | type=0 */ + + /* free section */ + *(--lptr) = nextbase - param; /* size */ + *(--lptr) = (base - param) | 126; /* offset | type=126 */ + + /* terminate pointer field */ + *(--lptr) = crc32(0, (void*)(base - 0x10), 0x10); + *(--lptr) = 0; /* offset=0 -> terminator */ return 0; } U_BOOT_CMD( painit, 1, 1, do_painit, - "painit - prepare PciAccess system\n", - NULL - ); + "prepare PciAccess system", + "" +); #endif /* CONFIG_PRAM */ -int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - if (argc > 1) { - if (argv[1][0] == '0') { - /* assert */ - printf("self-reset# asserted\n"); - out_be32((void*)GPIO0_TCR, - in_be32((void*)GPIO0_TCR) | GPIO0_SELF_RST); - } else { - /* deassert */ - printf("self-reset# deasserted\n"); - out_be32((void*)GPIO0_TCR, - in_be32((void*)GPIO0_TCR) & ~GPIO0_SELF_RST); - } - } else { - printf("self-reset# is %s\n", - in_be32((void*)GPIO0_TCR) & GPIO0_SELF_RST ? - "active" : "inactive"); - } - + in_be32((void*)CONFIG_SYS_RESET_BASE); return 0; } U_BOOT_CMD( - selfreset, 2, 1, do_selfreset, - "selfreset- assert self-reset# signal\n", - NULL - ); + selfreset, 1, 1, do_selfreset, + "assert self-reset# signal", + "" +); -int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA; @@ -455,11 +448,11 @@ int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( resetout, 2, 1, do_resetout, - "resetout - assert PMC-RESETOUT# signal\n", - NULL - ); + "assert PMC-RESETOUT# signal", + "" +); -int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { if (is_monarch()) { printf("This command is only supported in non-monarch mode\n"); @@ -487,12 +480,12 @@ int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( inta, 2, 1, do_inta, - "inta - Assert/Deassert or query INTA# state in non-monarch mode\n", - NULL - ); + "Assert/Deassert or query INTA# state in non-monarch mode", + "" +); /* test-only */ -int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong pciaddr; @@ -504,15 +497,15 @@ int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* map PCI address at 0xc0000000 in PLB space */ /* PMM1 Mask/Attribute - disabled b4 setting */ - out32r(PCIX0_PMM1MA, 0x00000000); + out32r(PCIL0_PMM1MA, 0x00000000); /* PMM1 Local Address */ - out32r(PCIX0_PMM1LA, 0xc0000000); + out32r(PCIL0_PMM1LA, 0xc0000000); /* PMM1 PCI Low Address */ - out32r(PCIX0_PMM1PCILA, pciaddr); + out32r(PCIL0_PMM1PCILA, pciaddr); /* PMM1 PCI High Address */ - out32r(PCIX0_PMM1PCIHA, 0x00000000); + out32r(PCIL0_PMM1PCIHA, 0x00000000); /* 256MB + No prefetching, and enable region */ - out32r(PCIX0_PMM1MA, 0xf0000001); + out32r(PCIL0_PMM1MA, 0xf0000001); } else { printf("Usage:\npmm %s\n", cmdtp->help); } @@ -520,33 +513,33 @@ int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( pmm, 2, 1, do_pmm, - "pmm - Setup pmm[1] registers\n", - " (pciaddr will be aligned to 256MB)\n" - ); + "Setup pmm[1] registers", + " (pciaddr will be aligned to 256MB)" +); -#if defined(CFG_EEPROM_WREN) -int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +#if defined(CONFIG_SYS_EEPROM_WREN) +int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int query = argc == 1; int state = 0; if (query) { /* Query write access state. */ - state = eeprom_write_enable(CFG_I2C_EEPROM_ADDR, -1); + state = eeprom_write_enable(CONFIG_SYS_I2C_EEPROM_ADDR, -1); if (state < 0) { puts("Query of write access state failed.\n"); } else { printf("Write access for device 0x%0x is %sabled.\n", - CFG_I2C_EEPROM_ADDR, state ? "en" : "dis"); + CONFIG_SYS_I2C_EEPROM_ADDR, state ? "en" : "dis"); state = 0; } } else { if ('0' == argv[1][0]) { /* Disable write access. */ - state = eeprom_write_enable(CFG_I2C_EEPROM_ADDR, 0); + state = eeprom_write_enable(CONFIG_SYS_I2C_EEPROM_ADDR, 0); } else { /* Enable write access. */ - state = eeprom_write_enable(CFG_I2C_EEPROM_ADDR, 1); + state = eeprom_write_enable(CONFIG_SYS_I2C_EEPROM_ADDR, 1); } if (state < 0) { puts("Setup of write access state failed.\n"); @@ -556,8 +549,9 @@ int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return state; } U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, - "eepwren - Enable / disable / query EEPROM write access\n", - NULL); -#endif /* #if defined(CFG_EEPROM_WREN) */ + "Enable / disable / query EEPROM write access", + "" +); +#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ #endif /* CONFIG_CMD_BSP */