X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fatmel%2Fatstk1000%2Fatstk1000.c;h=679b67432cc830d99e43e3a03c4f608516e34f15;hb=b2016133edec9ece02dca7881e2e0c059d2b421c;hp=4b6b90f683dcca568c9778462fd42f3d7e8079eb;hpb=aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c;p=oweals%2Fu-boot.git

diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c
index 4b6b90f683..679b67432c 100644
--- a/board/atmel/atstk1000/atstk1000.c
+++ b/board/atmel/atstk1000/atstk1000.c
@@ -17,45 +17,25 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
 	{
-		.virt_pgno	= CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-		.nr_pages	= CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-		.phys		= (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+		.virt_pgno	= CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+		.nr_pages	= CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+		.phys		= (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)
 					| MMU_VMR_CACHE_NONE,
 	}, {
-		.virt_pgno	= CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-		.nr_pages	= EBI_SDRAM_SIZE >> PAGE_SHIFT,
-		.phys		= (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+		.virt_pgno	= CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+		.nr_pages	= EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+		.phys		= (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)
 					| MMU_VMR_CACHE_WRBACK,
 	},
 };
 
 static const struct sdram_config sdram_config = {
-#if defined(CONFIG_ATSTK1006)
-	/* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
 	.data_bits	= SDRAM_DATA_32BIT,
-	.row_bits	= 13,
-	.col_bits	= 9,
-	.bank_bits	= 2,
-	.cas		= 2,
-	.twr		= 2,
-	.trc		= 7,
-	.trp		= 2,
-	.trcd		= 2,
-	.tras		= 4,
-	.txsr		= 7,
-	/* 7.81 us */
-	.refresh_period	= (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
-#else
-	/* MT48LC2M32B2P-5 (8 MB) on motherboard */
-#ifdef CONFIG_ATSTK1004
-	.data_bits	= SDRAM_DATA_16BIT,
-#else
-	.data_bits	= SDRAM_DATA_32BIT,
-#endif
 #ifdef CONFIG_ATSTK1000_16MB_SDRAM
 	/* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
 	.row_bits	= 12,
 #else
+	/* MT48LC2M32B2P-5 (8 MB) on motherboard */
 	.row_bits	= 11,
 #endif
 	.col_bits	= 8,
@@ -69,7 +49,6 @@ static const struct sdram_config sdram_config = {
 	.txsr		= 5,
 	/* 15.6 us */
 	.refresh_period	= (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
-#endif
 };
 
 int board_early_init_f(void)
@@ -78,7 +57,10 @@ int board_early_init_f(void)
 	hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
 
 	portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
+	sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
+
 	portmux_enable_usart1(PORTMUX_DRIVE_MIN);
+
 #if defined(CONFIG_MACB)
 	portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
 	portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
@@ -90,24 +72,6 @@ int board_early_init_f(void)
 	return 0;
 }
 
-phys_size_t initdram(int board_type)
-{
-	unsigned long expected_size;
-	unsigned long actual_size;
-	void *sdram_base;
-
-	sdram_base = uncached(EBI_SDRAM_BASE);
-
-	expected_size = sdram_init(sdram_base, &sdram_config);
-	actual_size = get_ram_size(sdram_base, expected_size);
-
-	if (expected_size != actual_size)
-		printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
-				actual_size >> 20, expected_size >> 20);
-
-	return actual_size;
-}
-
 int board_early_init_r(void)
 {
 	gd->bd->bi_phy_id[0] = 0x10;