X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Fatmel%2Fat91sam9n12ek%2Fat91sam9n12ek.c;h=d3555bbdf690e522d6f9e98541dce227b69efa8b;hb=20680b560a17fb29c862de77930cfbf76b24f83c;hp=3013a42a2ecf2123d0f8e963a342fdd8524d68c0;hpb=fbbbc86e8ebac4f42f4ca39ceba80cea27c983bc;p=oweals%2Fu-boot.git

diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
index 3013a42a2e..d3555bbdf6 100644
--- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2013 Atmel Corporation
  * Josh Wu <josh.wu@atmel.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -26,7 +10,6 @@
 #include <asm/arch/at91sam9x5_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
@@ -59,7 +42,7 @@ static void at91sam9n12ek_nand_hw_init(void)
 	/* Configure databus */
 	csa &= ~AT91_MATRIX_NFD0_ON_D16; /* nandflash connect to D0~D15 */
 	/* Configure IO drive */
-	csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+	csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
 
 	writel(csa, &matrix->ebicsa);
 
@@ -215,11 +198,17 @@ void at91sam9n12ek_ks8851_hw_init(void)
 }
 #endif
 
+#ifdef CONFIG_USB_ATMEL
+void at91sam9n12ek_usb_hw_init(void)
+{
+	at91_set_pio_output(AT91_PIO_PORTB, 7, 0);
+}
+#endif
+
 int board_early_init_f(void)
 {
-	/* Enable clocks for all PIOs */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel((1 << ATMEL_ID_PIOAB) | (1 << ATMEL_ID_PIOCD), &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOAB);
+	at91_periph_clk_enable(ATMEL_ID_PIOCD);
 
 	at91_seriald_hw_init();
 	return 0;
@@ -246,6 +235,10 @@ int board_init(void)
 	at91sam9n12ek_ks8851_hw_init();
 #endif
 
+#ifdef CONFIG_USB_ATMEL
+	at91sam9n12ek_usb_hw_init();
+#endif
+
 	return 0;
 }
 
@@ -262,3 +255,76 @@ int dram_init(void)
 					CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 }
+
+#if defined(CONFIG_SPL_BUILD)
+#include <spl.h>
+#include <nand.h>
+
+void at91_spl_board_init(void)
+{
+#ifdef CONFIG_SYS_USE_MMC
+	at91_mci_hw_init();
+#elif CONFIG_SYS_USE_NANDFLASH
+	at91sam9n12ek_nand_hw_init();
+#elif CONFIG_SYS_USE_SPIFLASH
+	at91_spi0_hw_init(1 << 4);
+#endif
+}
+
+#include <asm/arch/atmel_mpddrc.h>
+static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
+{
+	ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_13 |
+		    ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
+		    ATMEL_MPDDRC_CR_NB_8BANKS |
+		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
+
+	ddr2->rtr = 0x411;
+
+	ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
+		      8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
+
+	ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
+		      200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
+		      19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
+		      18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
+
+	ddr2->tpr2 = (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
+		      3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
+		      7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
+}
+
+void mem_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	struct atmel_mpddrc_config ddr2;
+	unsigned long csa;
+
+	ddr2_conf(&ddr2);
+
+	/* enable DDR2 clock */
+	writel(AT91_PMC_DDR, &pmc->scer);
+
+	/* Chip select 1 is for DDR2/SDRAM */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
+	csa &= ~AT91_MATRIX_EBI_DBPU_OFF;
+	csa |= AT91_MATRIX_EBI_DBPD_OFF;
+	csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+	writel(csa, &matrix->ebicsa);
+
+	/* DDRAM2 Controller initialize */
+	ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+}
+#endif