X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=board%2Famcc%2Focotea%2Focotea.c;h=bbb5331ef2ef7534929427f27df9d82125a70ddb;hb=d48455ad8cefd25d7b49f68fd16d0e9fd551732a;hp=2f64764ee2942911a11aafbf60531bae7256d5a2;hpb=9a81c61249d8361ed57d81f496121f3eb9c0eee8;p=oweals%2Fu-boot.git diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c index 2f64764ee2..bbb5331ef2 100644 --- a/board/amcc/ocotea/ocotea.c +++ b/board/amcc/ocotea/ocotea.c @@ -28,7 +28,7 @@ #include "ocotea.h" #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -275,78 +275,6 @@ long int fixed_sdram (void) } #endif /* !defined(CONFIG_SPD_EEPROM) */ - -/************************************************************************* - * pci_pre_init - * - * This routine is called just prior to registering the hose and gives - * the board the opportunity to check things. Returning a value of zero - * indicates that things are bad & PCI initialization should be aborted. - * - * Different boards may wish to customize the pci controller structure - * (add regions, override default access routines, etc) or perform - * certain pre-initialization actions. - * - ************************************************************************/ -#if defined(CONFIG_PCI) -int pci_pre_init(struct pci_controller * hose ) -{ - unsigned long strap; - - /*--------------------------------------------------------------------------+ - * The ocotea board is always configured as the host & requires the - * PCI arbiter to be enabled. - *--------------------------------------------------------------------------*/ - mfsdr(SDR0_SDSTP1, strap); - if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){ - printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap); - return 0; - } - - return 1; -} -#endif /* defined(CONFIG_PCI) */ - -/************************************************************************* - * pci_target_init - * - * The bootstrap configuration provides default settings for the pci - * inbound map (PIM). But the bootstrap config choices are limited and - * may not be sufficient for a given board. - * - ************************************************************************/ -#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) -void pci_target_init(struct pci_controller * hose ) -{ - /*--------------------------------------------------------------------------+ - * Disable everything - *--------------------------------------------------------------------------*/ - out32r( PCIL0_PIM0SA, 0 ); /* disable */ - out32r( PCIL0_PIM1SA, 0 ); /* disable */ - out32r( PCIL0_PIM2SA, 0 ); /* disable */ - out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */ - - /*--------------------------------------------------------------------------+ - * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping - * options to not support sizes such as 128/256 MB. - *--------------------------------------------------------------------------*/ - out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE ); - out32r( PCIL0_PIM0LAH, 0 ); - out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 ); - - out32r( PCIL0_BAR0, 0 ); - - /*--------------------------------------------------------------------------+ - * Program the board's subsystem id/vendor id - *--------------------------------------------------------------------------*/ - out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID ); - out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID ); - - out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY ); -} -#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ - - void fpga_init(void) { unsigned long group; @@ -472,15 +400,3 @@ void fpga_init(void) return; } - -#ifdef CONFIG_POST -/* - * Returns 1 if keys pressed to start the power-on long-running tests - * Called from board_init_f(). - */ -int post_hotkeys_pressed(void) -{ - - return (ctrlc()); -} -#endif