X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Fx86%2Finclude%2Fasm%2Firq.h;h=ddb529e5813bb5830412fd97bd62621d899170be;hb=42fd8c19b58fe8f8fe7559ea53b1cef12fc06240;hp=4de5512ce1333081ab1f5ad80bb146d3a12aee36;hpb=4d80051b63ff54f6b6f90fceb92cf87ab3401ecb;p=oweals%2Fu-boot.git

diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 4de5512ce1..ddb529e581 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -34,6 +34,8 @@ enum pirq_config {
  *		IRQ N is available to be routed
  * @lb_bdf:	irq router's PCI bus/device/function number encoding
  * @ibase:	IBASE register block base address
+ * @actl_8bit:	ACTL register width is 8-bit (for ICH series chipset)
+ * @actl_addr:	ACTL register offset
  */
 struct irq_router {
 	int config;
@@ -41,6 +43,8 @@ struct irq_router {
 	u16 irq_mask;
 	u32 bdf;
 	u32 ibase;
+	bool actl_8bit;
+	int actl_addr;
 };
 
 struct pirq_routing {
@@ -56,21 +60,10 @@ struct pirq_routing {
 #define PIRQ_BITMAP		0xdef8
 
 /**
- * cpu_irq_init() - Initialize CPU IRQ routing
+ * irq_router_common_init() - Perform common x86 interrupt init
  *
- * This initializes some platform-specific registers related to IRQ routing,
- * like configuring internal PCI devices to use which PCI interrupt pin,
- * and which PCI interrupt pin is mapped to which PIRQ line. Note on some
- * platforms, such IRQ routing might be hard-coded thus cannot configure.
+ * This creates the PIRQ routing table and routes the IRQs
  */
-void cpu_irq_init(void);
-
-/**
- * pirq_init() - Initialize platform PIRQ routing
- *
- * This initializes the PIRQ routing on the platform and configures all PCI
- * devices' interrupt line register to a working IRQ number on the 8259 PIC.
- */
-void pirq_init(void);
+int irq_router_common_init(struct udevice *dev);
 
 #endif /* _ARCH_IRQ_H_ */