X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Fx86%2Fcpu%2Fstart.S;h=01524635e9c82d9a498653605dc36d2107ea8d90;hb=748ff5350ae880ea01d3d72214122c3552a5185f;hp=8de55a0af1de3681a360ff35fb5acf70ef878a90;hpb=f1cc97764be4383d2aeb56d5ba5415439a1d5c97;p=oweals%2Fu-boot.git diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 8de55a0af1..01524635e9 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -1,13 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * U-Boot - x86 Startup Code * + * This is always the first code to run from the U-Boot source. To spell it out: + * + * 1. When TPL (Tertiary Program Loader) is enabled, the boot flow is + * TPL->SPL->U-Boot and this file is used for TPL. Then start_from_tpl.S is used + * for SPL and start_from_spl.S is used for U-Boot proper. + * + * 2. When SPL (Secondary Program Loader) is enabled, but not TPL, the boot + * flow is SPL->U-Boot and this file is used for SPL. Then start_from_spl.S is + * used for U-Boot proper. + * + * 3. When neither TPL nor SPL is used, this file is used for U-Boot proper. + * * (C) Copyright 2008-2011 * Graeme Russ, * * (C) Copyright 2002 * Daniel Engström, Omicron Ceti AB, - * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -17,8 +28,9 @@ #include #include #include +#include -.section .text +.section .text.start .code32 .globl _start .type _start, @function @@ -40,9 +52,6 @@ _x86boot_start: movl %eax, %cr0 wbinvd - /* Tell 32-bit code it is being entered from an in-RAM copy */ - movl $GD_FLG_WARM_BOOT, %ebx - /* * Zero the BIST (Built-In Self Test) value since we don't have it. * It must be 0 or the previous loader would have reported an error. @@ -55,11 +64,7 @@ _x86boot_start: .align 4 .long 0x12345678 _start: - /* - * This is the 32-bit cold-reset entry point, coming from start16. - * Set %ebx to GD_FLG_COLD_BOOT to indicate this. - */ - movl $GD_FLG_COLD_BOOT, %ebx + /* This is the 32-bit cold-reset entry point, coming from start16 */ /* Save BIST */ movl %eax, %ebp @@ -97,7 +102,7 @@ early_board_init_ret: jmp car_init .globl car_init_ret car_init_ret: -#ifndef CONFIG_HAVE_FSP +#ifdef CONFIG_USE_CAR /* * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, * or fully initialised SDRAM - we really don't care which) @@ -137,12 +142,13 @@ car_init_ret: /* Get address of global_data */ mov %fs:0, %edx -#ifdef CONFIG_HAVE_FSP +#if defined(CONFIG_USE_HOB) && !defined(CONFIG_USE_CAR) /* Store the HOB list if we have one */ test %esi, %esi jz skip_hob movl %esi, GD_HOB_LIST(%edx) +#ifdef CONFIG_HAVE_FSP /* * After fsp_init() returns, the stack has already been switched to a * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR. @@ -151,6 +157,7 @@ car_init_ret: */ subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp movl %esp, GD_MALLOC_BASE(%edx) +#endif skip_hob: #else /* Store table pointer */ @@ -185,21 +192,33 @@ board_init_f_r_trampoline: movl %eax, %esp /* See if we need to disable CAR */ -.weak car_uninit - movl $car_uninit, %eax - cmpl $0, %eax - jz 1f - call car_uninit -1: + /* Re-enter U-Boot by calling board_init_f_r() */ call board_init_f_r +#ifdef CONFIG_TPL +.globl jump_to_spl +.type jump_to_spl, @function +jump_to_spl: + /* Reset stack to the top of CAR space */ + movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp +#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE + subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp +#endif + + jmp *%eax +#endif + die: hlt jmp die hlt +WEAK(car_uninit) + ret +ENDPROC(car_uninit) + blank_idt_ptr: .word 0 /* limit */ .long 0 /* base */