X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Fpowerpc%2Finclude%2Fasm%2Ffsl_secure_boot.h;h=64c10074a896d2dd2001ee10826d17d25915c0bd;hb=e8f80a5a58c9b506453cc0780687e8ed457d30a6;hp=38b666c1bad0a7d9ba2c6e88d2ec88afdd89a718;hpb=e71372cb6371033a762b3329d063c3735a783a76;p=oweals%2Fu-boot.git diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 38b666c1ba..64c10074a8 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2010-2011 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __FSL_SECURE_BOOT_H @@ -9,11 +8,6 @@ #include #ifdef CONFIG_SECURE_BOOT - -#ifndef CONFIG_FIT_SIGNATURE -#define CONFIG_CHAIN_OF_TRUST -#endif - #if defined(CONFIG_FSL_CORENET) #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 #elif defined(CONFIG_TARGET_BSC9132QDS) @@ -25,16 +19,20 @@ #endif #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 -#if defined(CONFIG_B4860QDS) || \ - defined(CONFIG_T4240QDS) || \ - defined(CONFIG_T2080QDS) || \ - defined(CONFIG_T2080RDB) || \ - defined(CONFIG_T1040QDS) || \ - defined(CONFIG_T104xD4QDS) || \ - defined(CONFIG_T104xRDB) || \ - defined(CONFIG_T104xD4RDB) || \ - defined(CONFIG_PPC_T1023) || \ - defined(CONFIG_PPC_T1024) +#if defined(CONFIG_TARGET_B4860QDS) || \ + defined(CONFIG_TARGET_B4420QDS) || \ + defined(CONFIG_TARGET_T4160QDS) || \ + defined(CONFIG_TARGET_T4240QDS) || \ + defined(CONFIG_TARGET_T2080QDS) || \ + defined(CONFIG_TARGET_T2080RDB) || \ + defined(CONFIG_TARGET_T1040QDS) || \ + defined(CONFIG_TARGET_T1040RDB) || \ + defined(CONFIG_TARGET_T1040D4RDB) || \ + defined(CONFIG_TARGET_T1042RDB) || \ + defined(CONFIG_TARGET_T1042D4RDB) || \ + defined(CONFIG_TARGET_T1042RDB_PI) || \ + defined(CONFIG_ARCH_T1023) || \ + defined(CONFIG_ARCH_T1024) #ifndef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_CPC_REINIT_F #endif @@ -60,8 +58,8 @@ #if defined(CONFIG_ARCH_P3041) || \ defined(CONFIG_ARCH_P4080) || \ - defined(CONFIG_PPC_P5020) || \ - defined(CONFIG_PPC_P5040) || \ + defined(CONFIG_ARCH_P5020) || \ + defined(CONFIG_ARCH_P5040) || \ defined(CONFIG_ARCH_P2041) #define CONFIG_FSL_TRUST_ARCH_v1 #endif @@ -100,24 +98,13 @@ #define CONFIG_SPL_UBOOT_KEY_HASH NULL #endif /* ifdef CONFIG_SPL_BUILD */ -#define CONFIG_CMD_ESBC_VALIDATE -#define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON -#define CONFIG_SHA_PROG_HW_ACCEL -#define CONFIG_RSA_FREESCALE_EXP - -#ifndef CONFIG_FSL_CAAM -#define CONFIG_FSL_CAAM -#endif #ifndef CONFIG_SPL_BUILD /* * fsl_setenv_chain_of_trust() must be called from * board_late_init() */ -#ifndef CONFIG_BOARD_LATE_INIT -#define CONFIG_BOARD_LATE_INIT -#endif /* If Boot Script is not on NOR and is required to be copied on RAM */ #ifdef CONFIG_BOOTSCRIPT_COPY_RAM @@ -134,7 +121,7 @@ /* The bootscript header address is different for B4860 because the NOR * mapping is different on B4 due to reduced NOR size. */ -#if defined(CONFIG_B4860QDS) +#if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS) #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000 #elif defined(CONFIG_FSL_CORENET) #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000