X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fppc4xx%2Ffdt.c;h=c73509b3ee35be1b1c2a619bdb3547ea00b54ee5;hb=d77fa2ff766bbb4b867e791187f78b6033071613;hp=15a184b5c624cf27ae9c2a2be5e756b3298ace74;hpb=a77034a8dfc7942ca08483138dccdebeacc36826;p=oweals%2Fu-boot.git

diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index 15a184b5c6..c73509b3ee 100644
--- a/arch/powerpc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
@@ -2,40 +2,23 @@
  * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
 #include <watchdog.h>
 #include <command.h>
 #include <asm/cache.h>
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
 
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#ifdef CONFIG_OF_BOARD_SETUP
 #include <libfdt.h>
-#include <libfdt_env.h>
 #include <fdt_support.h>
 #include <asm/4xx_pcie.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-void __ft_board_setup(void *blob, bd_t *bd)
+int __ft_board_setup(void *blob, bd_t *bd)
 {
 	int rc;
 	int i;
@@ -59,14 +42,14 @@ void __ft_board_setup(void *blob, bd_t *bd)
 			*p++ = 0;
 			*p++ = bxcr & EBC_BXCR_BAS_MASK;
 			*p++ = EBC_BXCR_BANK_SIZE(bxcr);
+		}
+	}
+
 
 #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
-			/* Try to update reg property in nor flash node too */
-			fdt_fixup_nor_flash_size(blob, i,
-						 EBC_BXCR_BANK_SIZE(bxcr));
+	/* Update reg property in all nor flash nodes too */
+	fdt_fixup_nor_flash_size(blob);
 #endif
-		}
-	}
 
 	/* Some 405 PPC's have EBC as direct PLB child in the dts */
 	if (fdt_path_offset(blob, ebc_path) < 0)
@@ -77,8 +60,11 @@ void __ft_board_setup(void *blob, bd_t *bd)
 		printf("Unable to update property EBC mappings, err=%s\n",
 		       fdt_strerror(rc));
 	}
+
+	return 0;
 }
-void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup")));
+int ft_board_setup(void *blob, bd_t *bd)
+		__attribute__((weak, alias("__ft_board_setup")));
 
 /*
  * Fixup all PCIe nodes by setting the device_type property
@@ -141,7 +127,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 	/*
 	 * Fixup all UART clocks for CPU internal UARTs
-	 * (only these UARTs are definitely clocked by gd->uart_clk)
+	 * (only these UARTs are definitely clocked by gd->arch.uart_clk)
 	 *
 	 * These UARTs are direct childs of /plb/opb. This code
 	 * does not touch any UARTs that are connected to the ebc.
@@ -160,7 +146,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 		    (fdt_node_check_compatible(blob, off, "ns16550") == 0))
 			fdt_setprop(blob, off,
 				    "clock-frequency",
-				    (void*)&(gd->uart_clk), 4);
+				    (void *)&gd->arch.uart_clk, 4);
 	}
 
 	/*
@@ -174,4 +160,4 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	 */
 	fdt_pcie_setup(blob);
 }
-#endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */
+#endif /* CONFIG_OF_BOARD_SETUP */