X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fmpc85xx%2FKconfig;h=4db687cb922aec137937d47de2845e0f17fc03b3;hb=4f58002013ba1e89eb8fda015ff495bd37cd4016;hp=052417279f06fa8fbb31d3dd5f62a703e42411c0;hpb=22120f11e2e6951c8ae8c90fe9f896a1c8a3d313;p=oweals%2Fu-boot.git diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 052417279f..4db687cb92 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -4,6 +4,14 @@ menu "mpc85xx CPU" config SYS_CPU default "mpc85xx" +config CMD_ERRATA + bool "Enable the 'errata' command" + depends on MPC85xx + default y + help + This enables the 'errata' command which displays a list of errata + work-arounds which are enabled for the current board. + choice prompt "Target select" optional @@ -25,6 +33,7 @@ config TARGET_B4420QDS config TARGET_B4860QDS bool "Support B4860QDS" select ARCH_B4860 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT @@ -32,15 +41,19 @@ config TARGET_BSC9131RDB bool "Support BSC9131RDB" select ARCH_BSC9131 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_BSC9132QDS bool "Support BSC9132QDS" select ARCH_BSC9132 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_C29XPCIE bool "Support C29XPCIE" select ARCH_C29X + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL select PHYS_64BIT @@ -49,21 +62,25 @@ config TARGET_P3041DS bool "Support P3041DS" select PHYS_64BIT select ARCH_P3041 + select BOARD_LATE_INIT if CHAIN_OF_TRUST config TARGET_P4080DS bool "Support P4080DS" select PHYS_64BIT select ARCH_P4080 + select BOARD_LATE_INIT if CHAIN_OF_TRUST config TARGET_P5020DS bool "Support P5020DS" select PHYS_64BIT select ARCH_P5020 + select BOARD_LATE_INIT if CHAIN_OF_TRUST config TARGET_P5040DS bool "Support P5040DS" select PHYS_64BIT select ARCH_P5040 + select BOARD_LATE_INIT if CHAIN_OF_TRUST config TARGET_MPC8536DS bool "Support MPC8536DS" @@ -71,10 +88,6 @@ config TARGET_MPC8536DS # Use DDR3 controller with DDR2 DIMMs on this board select SYS_FSL_DDRC_GEN3 -config TARGET_MPC8540ADS - bool "Support MPC8540ADS" - select ARCH_MPC8540 - config TARGET_MPC8541CDS bool "Support MPC8541CDS" select ARCH_MPC8541 @@ -91,10 +104,6 @@ config TARGET_MPC8555CDS bool "Support MPC8555CDS" select ARCH_MPC8555 -config TARGET_MPC8560ADS - bool "Support MPC8560ADS" - select ARCH_MPC8560 - config TARGET_MPC8568MDS bool "Support MPC8568MDS" select ARCH_MPC8568 @@ -112,14 +121,18 @@ config TARGET_MPC8572DS config TARGET_P1010RDB_PA bool "Support P1010RDB_PA" select ARCH_P1010 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + imply CMD_EEPROM config TARGET_P1010RDB_PB bool "Support P1010RDB_PB" select ARCH_P1010 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + imply CMD_EEPROM config TARGET_P1022DS bool "Support P1022DS" @@ -130,54 +143,63 @@ config TARGET_P1022DS config TARGET_P1023RDB bool "Support P1023RDB" select ARCH_P1023 + imply CMD_EEPROM config TARGET_P1020MBG bool "Support P1020MBG-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1020RDB_PC bool "Support P1020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1020RDB_PD bool "Support P1020RDB-PD" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1020UTM bool "Support P1020UTM" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1021RDB bool "Support P1021RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1021 + imply CMD_EEPROM config TARGET_P1024RDB bool "Support P1024RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1024 + imply CMD_EEPROM config TARGET_P1025RDB bool "Support P1025RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1025 + imply CMD_EEPROM config TARGET_P2020RDB bool "Support P2020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P2020 + imply CMD_EEPROM config TARGET_P1_TWR bool "Support p1_twr" @@ -186,6 +208,7 @@ config TARGET_P1_TWR config TARGET_P2041RDB bool "Support P2041RDB" select ARCH_P2041 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select PHYS_64BIT config TARGET_QEMU_PPCE500 @@ -196,65 +219,80 @@ config TARGET_QEMU_PPCE500 config TARGET_T1024QDS bool "Support T1024QDS" select ARCH_T1024 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1023RDB bool "Support T1023RDB" select ARCH_T1023 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1024RDB bool "Support T1024RDB" select ARCH_T1024 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1040QDS bool "Support T1040QDS" select ARCH_T1040 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1040RDB bool "Support T1040RDB" select ARCH_T1040 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT config TARGET_T1040D4RDB bool "Support T1040D4RDB" select ARCH_T1040 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT config TARGET_T1042RDB bool "Support T1042RDB" select ARCH_T1042 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT config TARGET_T1042D4RDB bool "Support T1042D4RDB" select ARCH_T1042 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT config TARGET_T1042RDB_PI bool "Support T1042RDB_PI" select ARCH_T1042 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT config TARGET_T2080QDS bool "Support T2080QDS" select ARCH_T2080 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT config TARGET_T2080RDB bool "Support T2080RDB" select ARCH_T2080 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT @@ -267,6 +305,7 @@ config TARGET_T2081QDS config TARGET_T4160QDS bool "Support T4160QDS" select ARCH_T4160 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT @@ -279,6 +318,7 @@ config TARGET_T4160RDB config TARGET_T4240QDS bool "Support T4240QDS" select ARCH_T4240 + select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT @@ -296,6 +336,8 @@ config TARGET_KMP204X bool "Support kmp204x" select ARCH_P2041 select PHYS_64BIT + imply CMD_CRAMFS + imply FS_CRAMFS config TARGET_XPEDITE520X bool "Support xpedite520x" @@ -330,6 +372,7 @@ endchoice config ARCH_B4420 bool select E500MC + select E6500 select FSL_LAW select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004477 @@ -344,12 +387,17 @@ config ARCH_B4420 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_IFC + imply CMD_EEPROM config ARCH_B4860 bool select E500MC + select E6500 select FSL_LAW select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004477 @@ -361,11 +409,16 @@ config ARCH_B4860 select SYS_FSL_ERRATUM_A007075 select SYS_FSL_ERRATUM_A007186 select SYS_FSL_ERRATUM_A007212 + select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_IFC + imply CMD_EEPROM config ARCH_BSC9131 bool @@ -378,6 +431,8 @@ config ARCH_BSC9131 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_IFC + imply CMD_EEPROM config ARCH_BSC9132 bool @@ -394,6 +449,8 @@ config ARCH_BSC9132 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC + imply CMD_EEPROM config ARCH_C29X bool @@ -406,6 +463,7 @@ config ARCH_C29X select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_MPC8536 bool @@ -418,6 +476,7 @@ config ARCH_MPC8536 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8540 bool @@ -441,6 +500,7 @@ config ARCH_MPC8544 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8548 bool @@ -487,6 +547,7 @@ config ARCH_MPC8569 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8572 bool @@ -501,6 +562,7 @@ config ARCH_MPC8572 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1010 bool @@ -521,6 +583,8 @@ config ARCH_P1010 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC + imply CMD_EEPROM config ARCH_P1011 bool @@ -534,6 +598,7 @@ config ARCH_P1011 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1020 bool @@ -547,6 +612,7 @@ config ARCH_P1020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1021 bool @@ -560,6 +626,7 @@ config ARCH_P1021 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1022 bool @@ -575,6 +642,7 @@ config ARCH_P1022 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1023 bool @@ -586,6 +654,7 @@ config ARCH_P1023 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P1024 bool @@ -599,6 +668,8 @@ config ARCH_P1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC + imply CMD_EEPROM config ARCH_P1025 bool @@ -612,6 +683,7 @@ config ARCH_P1025 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2020 bool @@ -626,6 +698,8 @@ config ARCH_P2020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC + imply CMD_EEPROM config ARCH_P2041 bool @@ -644,8 +718,10 @@ config ARCH_P2041 select SYS_FSL_ERRATUM_USB14 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P3041 bool @@ -666,8 +742,10 @@ config ARCH_P3041 select SYS_FSL_ERRATUM_USB14 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P4080 bool @@ -699,8 +777,10 @@ config ARCH_P4080 select SYS_P4080_ERRATUM_SERDES_A005 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P5020 bool @@ -717,8 +797,11 @@ config ARCH_P5020 select SYS_FSL_ERRATUM_USB14 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_ELBC config ARCH_P5040 bool @@ -735,8 +818,11 @@ config ARCH_P5040 select SYS_FSL_ERRATUM_USB14 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_ELBC config ARCH_QEMU_E500 bool @@ -753,8 +839,11 @@ config ARCH_T1023 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC + imply CMD_EEPROM config ARCH_T1024 bool @@ -768,8 +857,11 @@ config ARCH_T1024 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC + imply CMD_EEPROM config ARCH_T1040 bool @@ -784,8 +876,10 @@ config ARCH_T1040 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1042 bool @@ -800,28 +894,37 @@ config ARCH_T1042 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T2080 bool select E500MC + select E6500 select FSL_LAW select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A006379 select SYS_FSL_ERRATUM_A006593 select SYS_FSL_ERRATUM_A007186 select SYS_FSL_ERRATUM_A007212 + select SYS_FSL_ERRATUM_A007815 + select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_IFC config ARCH_T2081 bool select E500MC + select E6500 select FSL_LAW select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A006379 @@ -832,12 +935,16 @@ config ARCH_T2081 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_IFC config ARCH_T4160 bool select E500MC + select E6500 select FSL_LAW select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004468 @@ -849,12 +956,16 @@ config ARCH_T4160 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_IFC config ARCH_T4240 bool select E500MC + select E6500 select FSL_LAW select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004468 @@ -864,11 +975,16 @@ config ARCH_T4240 select SYS_FSL_ERRATUM_A006593 select SYS_FSL_ERRATUM_A007186 select SYS_FSL_ERRATUM_A007798 + select SYS_FSL_ERRATUM_A007815 + select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_PPC64 + select FSL_IFC config BOOKE bool @@ -885,6 +1001,11 @@ config E500MC help Enble PowerPC E500MC core +config E6500 + bool + help + Enable PowerPC E6500 core + config FSL_LAW bool help @@ -1044,9 +1165,15 @@ config SYS_FSL_ERRATUM_A007186 config SYS_FSL_ERRATUM_A007212 bool +config SYS_FSL_ERRATUM_A007815 + bool + config SYS_FSL_ERRATUM_A007798 bool +config SYS_FSL_ERRATUM_A007907 + bool + config SYS_FSL_ERRATUM_A008044 bool @@ -1121,6 +1248,12 @@ config SYS_P4080_ERRATUM_SERDES_A001 config SYS_P4080_ERRATUM_SERDES_A005 bool +config SYS_FSL_QORIQ_CHASSIS1 + bool + +config SYS_FSL_QORIQ_CHASSIS2 + bool + config SYS_FSL_NUM_LAWS int "Number of local access windows" depends on FSL_LAW @@ -1165,6 +1298,11 @@ config SYS_FSL_NUM_LAWS Number of local access windows. This is fixed per SoC. If not sure, do not change. +config SYS_FSL_THREADS_PER_CORE + int + default 2 if E6500 + default 1 + config SYS_NUM_TLBCAMS int "Number of TLB CAM entries" default 64 if E500MC @@ -1173,9 +1311,18 @@ config SYS_NUM_TLBCAMS Number of TLB CAM entries for Book-E chips. 64 for E500MC, 16 for other E500 SoCs. +config SYS_PPC64 + bool + config SYS_PPC_E500_USE_DEBUG_TLB bool +config FSL_IFC + bool + +config FSL_ELBC + bool + config SYS_PPC_E500_DEBUG_TLB int "Temporary TLB entry for external debugger" depends on SYS_PPC_E500_USE_DEBUG_TLB @@ -1200,18 +1347,50 @@ config SYS_PPC_E500_DEBUG_TLB symbol should be set to the TLB1 entry to be used for this purpose. If unsure, do not change. +config SYS_FSL_IFC_CLK_DIV + int "Divider of platform clock" + depends on FSL_IFC + default 2 if ARCH_B4420 || \ + ARCH_B4860 || \ + ARCH_T1024 || \ + ARCH_T1023 || \ + ARCH_T1040 || \ + ARCH_T1042 || \ + ARCH_T4160 || \ + ARCH_T4240 + default 1 + help + Defines divider of platform clock(clock input to + IFC controller). + +config SYS_FSL_LBC_CLK_DIV + int "Divider of platform clock" + depends on FSL_ELBC || ARCH_MPC8540 || \ + ARCH_MPC8548 || ARCH_MPC8541 || \ + ARCH_MPC8555 || ARCH_MPC8560 || \ + ARCH_MPC8568 + + default 2 if ARCH_P2041 || \ + ARCH_P3041 || \ + ARCH_P4080 || \ + ARCH_P5020 || \ + ARCH_P5040 + default 1 + + help + Defines divider of platform clock(clock input to + eLBC controller). + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" source "board/freescale/c29xpcie/Kconfig" source "board/freescale/corenet_ds/Kconfig" source "board/freescale/mpc8536ds/Kconfig" -source "board/freescale/mpc8540ads/Kconfig" source "board/freescale/mpc8541cds/Kconfig" source "board/freescale/mpc8544ds/Kconfig" source "board/freescale/mpc8548cds/Kconfig" source "board/freescale/mpc8555cds/Kconfig" -source "board/freescale/mpc8560ads/Kconfig" source "board/freescale/mpc8568mds/Kconfig" source "board/freescale/mpc8569mds/Kconfig" source "board/freescale/mpc8572ds/Kconfig"