X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fmpc83xx%2Fspd_sdram.c;h=f62e1b79d36a25957c8298b85baaa098b14212ed;hb=256d83cd6d8caf345ffba414a0f77f30d68caf8a;hp=9b01f0d8fb44a7afb60e8ac34b0304a14fae6631;hpb=9023ae305919d0aecb4a22726b9d08c6b08189d7;p=oweals%2Fu-boot.git

diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 9b01f0d8fb..f62e1b79d3 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -8,23 +8,7 @@
  * (C) Copyright 2003 Motorola Inc.
  * Xianghua Xiao (X.Xiao@motorola.com)
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -46,10 +30,19 @@ void board_add_ram_info(int use_default)
 	printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK)
 			   >> SDRAM_CFG_SDRAM_TYPE_SHIFT) - 1);
 
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x)
+	if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_16)
+		puts(", 16-bit");
+	else if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_32)
+		puts(", 32-bit");
+	else
+		puts(", unknown width");
+#else
 	if (ddr->sdram_cfg & SDRAM_CFG_32_BE)
 		puts(", 32-bit");
 	else
 		puts(", 64-bit");
+#endif
 
 	if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN)
 		puts(", ECC on");
@@ -140,7 +133,7 @@ long int spd_sdram()
 	unsigned int memsize;
 	unsigned int law_size;
 	unsigned char caslat, caslat_ctrl;
-	unsigned int trfc, trfc_clk, trfc_low, trfc_high;
+	unsigned int trfc, trfc_clk, trfc_low;
 	unsigned int trcd_clk, trtp_clk;
 	unsigned char cke_min_clk;
 	unsigned char add_lat, wr_lat;
@@ -533,7 +526,6 @@ long int spd_sdram()
 	 * so preadjust it down 8 first before splitting it up.
 	 */
 	trfc_low = (trfc_clk - 8) & 0xf;
-	trfc_high = ((trfc_clk - 8) >> 4) & 0x3;
 
 	ddr->timing_cfg_1 =
 	    (((picos_to_clk(spd.trp * 250) & 0x07) << 28 ) |	/* PRETOACT */