X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Favr32%2Fcpu%2Fcpu.c;h=cd226a6f71b384f757441098dc0708241e867453;hb=4db896236cdac37db17b215ba3ff2d2701bddb49;hp=904bfb227e5b2534cecf429213d55aa7f23bf905;hpb=8a15c2d10b0b784f0cfba1240f06a4d933b975fa;p=oweals%2Fu-boot.git diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c index 904bfb227e..cd226a6f71 100644 --- a/arch/avr32/cpu/cpu.c +++ b/arch/avr32/cpu/cpu.c @@ -1,23 +1,7 @@ /* * Copyright (C) 2005-2006 Atmel Corporation * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include #include @@ -27,7 +11,7 @@ #include #include -#include +#include #include "hsmc3.h" @@ -43,11 +27,11 @@ DECLARE_GLOBAL_DATA_PTR; -int cpu_init(void) +int arch_cpu_init(void) { extern void _evba(void); - gd->cpu_hz = CONFIG_SYS_OSC0_HZ; + gd->arch.cpu_hz = CONFIG_SYS_OSC0_HZ; /* TODO: Move somewhere else, but needs to be run before we * increase the clock frequency. */ @@ -59,7 +43,7 @@ int cpu_init(void) clk_init(); /* Update the CPU speed according to the PLL configuration */ - gd->cpu_hz = get_cpu_clk_rate(); + gd->arch.cpu_hz = get_cpu_clk_rate(); /* Set up the exception handler table and enable exceptions */ sysreg_write(EVBA, (unsigned long)&_evba); @@ -76,7 +60,7 @@ void prepare_to_boot(void) "sync 0" : : "r"(0) : "memory"); } -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { /* This will reset the CPU core, caches, MMU and all internal busses */ __builtin_mtdr(8, 1 << 13); /* set DC:DBE */