X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fmach-uniphier%2Fboard_init.c;h=2564a02a62305cc2fb8e75cf4507b9e62e6cfcf8;hb=48dce3bfd93f1cd9766bc6afe3c403bef0254bbc;hp=228092c15e485cf6bcf2ceb1c999327aa1196158;hpb=5ac9dfbe9d9a19b04ddb306e7d6833861f9b6f72;p=oweals%2Fu-boot.git

diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index 228092c15e..2564a02a62 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -12,6 +12,7 @@
 
 #include "init.h"
 #include "micro-support-card.h"
+#include "sg-regs.h"
 #include "soc-info.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -47,98 +48,190 @@ static void uniphier_setup_xirq(void)
 	writel(tmp, 0x55000090);
 }
 
-static void uniphier_nand_pin_init(bool cs2)
+#ifdef CONFIG_ARCH_UNIPHIER_LD11
+static void uniphier_ld11_misc_init(void)
 {
-#ifdef CONFIG_NAND_DENALI
-	if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp"))
-		pr_err("failed to init NAND pins\n");
-#endif
+	sg_set_pinsel(149, 14, 8, 4);	/* XIRQ0    -> XIRQ0 */
+	sg_set_iectrl(149);
+	sg_set_pinsel(153, 14, 8, 4);	/* XIRQ4    -> XIRQ4 */
+	sg_set_iectrl(153);
 }
+#endif
 
-int board_init(void)
+#ifdef CONFIG_ARCH_UNIPHIER_LD20
+static void uniphier_ld20_misc_init(void)
 {
-	led_puts("U0");
+	sg_set_pinsel(149, 14, 8, 4);	/* XIRQ0    -> XIRQ0 */
+	sg_set_iectrl(149);
+	sg_set_pinsel(153, 14, 8, 4);	/* XIRQ4    -> XIRQ4 */
+	sg_set_iectrl(153);
+
+	/* ES1 errata: increase VDD09 supply to suppress VBO noise */
+	if (uniphier_get_soc_revision() == 1) {
+		writel(0x00000003, 0x6184e004);
+		writel(0x00000100, 0x6184e040);
+		writel(0x0000b500, 0x6184e024);
+		writel(0x00000001, 0x6184e000);
+	}
+#ifdef CONFIG_ARMV8_MULTIENTRY
+	cci500_init(2);
+#endif
+}
+#endif
+
+struct uniphier_initdata {
+	unsigned int soc_id;
+	bool nand_2cs;
+	void (*sbc_init)(void);
+	void (*pll_init)(void);
+	void (*clk_init)(void);
+	void (*misc_init)(void);
+};
 
-	switch (uniphier_get_soc_type()) {
+static const struct uniphier_initdata uniphier_initdata[] = {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-	case SOC_UNIPHIER_SLD3:
-		uniphier_nand_pin_init(true);
-		led_puts("U1");
-		uniphier_ld4_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_SLD3_ID,
+		.nand_2cs = true,
+		.sbc_init = uniphier_sbc_init_admulti,
+		.pll_init = uniphier_sld3_pll_init,
+		.clk_init = uniphier_ld4_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
-	case SOC_UNIPHIER_LD4:
-		uniphier_nand_pin_init(true);
-		led_puts("U1");
-		uniphier_ld4_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_LD4_ID,
+		.nand_2cs = true,
+		.sbc_init = uniphier_ld4_sbc_init,
+		.pll_init = uniphier_ld4_pll_init,
+		.clk_init = uniphier_ld4_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
-	case SOC_UNIPHIER_PRO4:
-		uniphier_nand_pin_init(false);
-		led_puts("U1");
-		uniphier_pro4_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_PRO4_ID,
+		.nand_2cs = false,
+		.sbc_init = uniphier_sbc_init_savepin,
+		.pll_init = uniphier_pro4_pll_init,
+		.clk_init = uniphier_pro4_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
-	case SOC_UNIPHIER_SLD8:
-		uniphier_nand_pin_init(true);
-		led_puts("U1");
-		uniphier_ld4_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_SLD8_ID,
+		.nand_2cs = true,
+		.sbc_init = uniphier_ld4_sbc_init,
+		.pll_init = uniphier_ld4_pll_init,
+		.clk_init = uniphier_ld4_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-	case SOC_UNIPHIER_PRO5:
-		uniphier_nand_pin_init(true);
-		led_puts("U1");
-		uniphier_pro5_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_PRO5_ID,
+		.nand_2cs = true,
+		.sbc_init = uniphier_sbc_init_savepin,
+		.clk_init = uniphier_pro5_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
-	case SOC_UNIPHIER_PXS2:
-		uniphier_nand_pin_init(true);
-		led_puts("U1");
-		uniphier_pxs2_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_PXS2_ID,
+		.nand_2cs = true,
+		.sbc_init = uniphier_pxs2_sbc_init,
+		.clk_init = uniphier_pxs2_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
-	case SOC_UNIPHIER_LD6B:
-		uniphier_nand_pin_init(true);
-		led_puts("U1");
-		uniphier_pxs2_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_LD6B_ID,
+		.nand_2cs = true,
+		.sbc_init = uniphier_pxs2_sbc_init,
+		.clk_init = uniphier_pxs2_clk_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
-	case SOC_UNIPHIER_LD11:
-		uniphier_nand_pin_init(false);
-		uniphier_ld20_pin_init();
-		led_puts("U1");
-		uniphier_ld11_clk_init();
-		break;
+	{
+		.soc_id = UNIPHIER_LD11_ID,
+		.nand_2cs = false,
+		.sbc_init = uniphier_ld11_sbc_init,
+		.pll_init = uniphier_ld11_pll_init,
+		.clk_init = uniphier_ld11_clk_init,
+		.misc_init = uniphier_ld11_misc_init,
+	},
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
-	case SOC_UNIPHIER_LD20:
-		uniphier_nand_pin_init(false);
-		uniphier_ld20_pin_init();
-		led_puts("U1");
-		uniphier_ld20_clk_init();
-		cci500_init(2);
-		break;
+	{
+		.soc_id = UNIPHIER_LD20_ID,
+		.nand_2cs = false,
+		.sbc_init = uniphier_ld11_sbc_init,
+		.pll_init = uniphier_ld20_pll_init,
+		.clk_init = uniphier_ld20_clk_init,
+		.misc_init = uniphier_ld20_misc_init,
+	},
 #endif
-	default:
-		break;
+#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
+	{
+		.soc_id = UNIPHIER_PXS3_ID,
+		.nand_2cs = false,
+		.sbc_init = uniphier_pxs2_sbc_init,
+		.pll_init = uniphier_pxs3_pll_init,
+	},
+#endif
+};
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
+
+int board_init(void)
+{
+	const struct uniphier_initdata *initdata;
+	int ret;
+
+	led_puts("U0");
+
+	initdata = uniphier_get_initdata();
+	if (!initdata) {
+		pr_err("unsupported SoC\n");
+		return -EINVAL;
 	}
 
-	uniphier_setup_xirq();
+	initdata->sbc_init();
+
+	support_card_init();
+
+	led_puts("U0");
+
+	if (IS_ENABLED(CONFIG_NAND_DENALI)) {
+		ret = uniphier_pin_init(initdata->nand_2cs ?
+					"nand2cs_grp" : "nand_grp");
+		if (ret)
+			pr_err("failed to init NAND pins\n");
+	}
+
+	led_puts("U1");
+
+	if (initdata->pll_init)
+		initdata->pll_init();
 
 	led_puts("U2");
 
-	support_card_late_init();
+	if (initdata->clk_init)
+		initdata->clk_init();
 
 	led_puts("U3");
 
-#ifdef CONFIG_ARM64
+	if (initdata->misc_init)
+		initdata->misc_init();
+
+	led_puts("U4");
+
+	uniphier_setup_xirq();
+
+	led_puts("U5");
+
+	support_card_late_init();
+
+	led_puts("U6");
+
+#ifdef CONFIG_ARMV8_MULTIENTRY
 	uniphier_smp_kick_all_cpus();
 #endif